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[209.85.221.42]) by smtp.gmail.com with ESMTPSA id d3sm4466646edd.88.2019.06.18.00.19.55 for (version=TLS1_3 cipher=AEAD-AES128-GCM-SHA256 bits=128/128); Tue, 18 Jun 2019 00:19:55 -0700 (PDT) Received: by mail-wr1-f42.google.com with SMTP id n4so12641742wrw.13 for ; Tue, 18 Jun 2019 00:19:55 -0700 (PDT) X-Received: by 2002:adf:fc85:: with SMTP id g5mr79869381wrr.324.1560842394887; Tue, 18 Jun 2019 00:19:54 -0700 (PDT) MIME-Version: 1.0 References: <20190614164324.9427-1-jagan@amarulasolutions.com> <20190614164324.9427-6-jagan@amarulasolutions.com> In-Reply-To: From: Chen-Yu Tsai Date: Tue, 18 Jun 2019 15:19:43 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [linux-sunxi] [PATCH v2 5/9] drm/sun4i: tcon_top: Register clock gates in probe To: Jagan Teki X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190618_001959_950030_282C4E8A X-CRM114-Status: GOOD ( 23.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree , Jernej Skrabec , Maxime Ripard , linux-kernel , dri-devel , David Airlie , linux-sunxi , Daniel Vetter , Michael Trimarchi , linux-amarula , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jun 17, 2019 at 6:30 PM Jagan Teki wrote: > > On Sun, Jun 16, 2019 at 11:01 AM Chen-Yu Tsai wrote: > > > > On Sat, Jun 15, 2019 at 12:44 AM Jagan Teki wrote: > > > > > > TCON TOP have clock gates for TV0, TV1, dsi and right > > > now these are register during bind call. > > > > > > Of which, dsi clock gate would required during DPHY probe > > > but same can miss to get since tcon top is not bound at > > > that time. > > > > > > To solve, this circular dependency move the clock gate > > > registration from bind to probe so-that DPHY can get the > > > dsi gate clock on time. > > > > > > Signed-off-by: Jagan Teki > > > --- > > > drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 94 ++++++++++++++------------ > > > 1 file changed, 49 insertions(+), 45 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c > > > index 465e9b0cdfee..a8978b3fe851 100644 > > > --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c > > > +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c > > > @@ -124,7 +124,53 @@ static struct clk_hw *sun8i_tcon_top_register_gate(struct device *dev, > > > static int sun8i_tcon_top_bind(struct device *dev, struct device *master, > > > void *data) > > > { > > > - struct platform_device *pdev = to_platform_device(dev); > > > + struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev); > > > + int ret; > > > + > > > + ret = reset_control_deassert(tcon_top->rst); > > > + if (ret) { > > > + dev_err(dev, "Could not deassert ctrl reset control\n"); > > > + return ret; > > > + } > > > + > > > + ret = clk_prepare_enable(tcon_top->bus); > > > + if (ret) { > > > + dev_err(dev, "Could not enable bus clock\n"); > > > + goto err_assert_reset; > > > + } > > > > You have to de-assert the reset control and enable the clock before the > > clocks it provides are registered. Otherwise a consumer may come in and > > ask for the provided clock to be enabled, but since the TCON TOP's own > > reset and clock are still disabled, you can't actually access the registers > > that controls the provided clock. > > These rst and bus are common reset and bus clocks not tcon top clocks > that are trying to register here. ie reason I have not moved it in > top. And you're sure that toggling bits in the TCON TOP block doesn't require the reset to be de-asserted and the bus clock enabled? Somehow I doubt that. Once the driver register the clocks it provides, they absolutely must work. They can't only work after the bind phase when the reset gets de-asserted and the bus clock enabled. Or you should provide proper error reporting in the clock ops. I doubt you want to go that way either. ChenYu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel