From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.7 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72A09C2B9F4 for ; Thu, 17 Jun 2021 12:27:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3A4FD60FDB for ; Thu, 17 Jun 2021 12:27:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3A4FD60FDB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MM7GSWlSBHCzxjJKvrimswuwMHeByEhyyjLxtI9NxDQ=; b=pNB+A01QN641Mt fBJ9145PJImf2PPeFFVb9q2e/omg1RNkef0fkTKTlBKgAIrh7WWOZ0WFGINhJSp+HkQB9nPZola9P ll5bUQ0JupZCTwTqPsU05swA6Rza7p8bfZIObWB6lACmfTTx3aQjPnQCCYc7/F/3cfeiCP3PZ2cwd chcisKGic/MfdMiR1gyBQJQDbtDvbsjX3RBUfmGPSXUUh2QePIeluW7r/wo5VGQfl0hTKeycJI0fm MAa94omfsbZytkUgQWc4QOfZYQ5FSUiaQBdnKJQhwYYYuc7/Nhk6MNTapsvmPRx04diA8hGgpdrGC ZQVkqtz/YU9IUU/EigHw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ltr5y-00AHX2-JS; Thu, 17 Jun 2021 12:26:06 +0000 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ltr5t-00AHVI-Dn for linux-arm-kernel@lists.infradead.org; Thu, 17 Jun 2021 12:26:04 +0000 Received: by mail-ej1-x62c.google.com with SMTP id gb32so1393931ejc.2 for ; Thu, 17 Jun 2021 05:25:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=k3TVRDhr4luopUweKfr85DBxbwwXK8Sy+b1ey7mzQeY=; b=YhZPQwDy0E8jpQThgvwN57N3hpE8XeRlZ6TNx5SIDTSHMIeWOB8so+JAGdd19UMtBK D20igznA+WIj0hOzWj+md44eVTsaBFqAZ5iZ1T1QpGg0F1Kkwj1/hELbaWDVzink2p4C 9NARUZuVXOINg42uPUXVkDZPIBaBXOiE8mKEJFyE12mcE/8WFkGFuQUoKXmNxUF24yFy EOw9net7I5i7XwekV/nK/AdboMoQHf8vfP/N0AKc7fWMAHqbFWVWoh3T5/rPI/+AFyUM 6O5hUIPSp7I3XDfviupqxmDGSS/F7OzS/UTUbFZ1+u64fgJEXyQd7NZGPiHaFonXryVh Vytw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=k3TVRDhr4luopUweKfr85DBxbwwXK8Sy+b1ey7mzQeY=; b=GZXn/0gzIYgcT9SybzohL4W6lpzYgYoNmKU5NJZyIlaa/bmtgYzJ67p69RwGzzeAml MSA0rrRG4HyyQLo7iGZF2hTbcSAjo33V7ivXELefaynxNOQOH1OGaTDQHeHGOl2A6zSp fp/i0lJBq7mLOQuDhqr7LUe2Bbhof6zE7rTUyrK80AzPQw8q/YAPPvTa1qhYe+ToARIQ +xhmhNI2mgLMqtv/7X/5y/RLwDSBNaLAl+ChXLIlXkcI4tEz+IO7b6qhlcIHR+DfjKYX 2SqI9KIgn2DmjW7yMJtVBHOOhhv7kKM+xAc5OJQH81LaaViqorRI0SjlgzT08k7CYtJ6 Fa9A== X-Gm-Message-State: AOAM532hL4AYPDVJsa504z0snSTDWnxEPchdFoXgRIVoSNeQjBk/646j BfOQKvG1aYRqt/UeFUk/rbtAPOtwbW0fYdVhSHU= X-Google-Smtp-Source: ABdhPJyDAY/Iqx/8tko+9HxeiXE+1lqE5Oec0+Op5lvrKDtbuC2yszisOVUGLe4LIYgIkqVhUt9UqMGlgVdsolzuBP8= X-Received: by 2002:a17:907:70d3:: with SMTP id yk19mr4915750ejb.450.1623932758405; Thu, 17 Jun 2021 05:25:58 -0700 (PDT) MIME-Version: 1.0 References: <20210612133134.2738-1-peng.fan@oss.nxp.com> <20210612133134.2738-5-peng.fan@oss.nxp.com> <7683ab0b-f905-dff1-aa4f-76ad638da568@oss.nxp.com> In-Reply-To: From: Adam Ford Date: Thu, 17 Jun 2021 07:25:47 -0500 Message-ID: Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM To: "Peng Fan (OSS)" Cc: Rob Herring , Shawn Guo , Sascha Hauer , Sascha Hauer , Fabio Estevam , dl-linux-imx , Philipp Zabel , Lucas Stach , Krzysztof Kozlowski , =?UTF-8?Q?Guido_G=C3=BCnther?= , Marek Vasut , Andrey Smirnov , devicetree , arm-soc , Linux Kernel Mailing List , Jacky Bai , Schrempf Frieder , Abel Vesa X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210617_052601_552271_39E77B39 X-CRM114-Status: GOOD ( 53.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jun 16, 2021 at 10:14 PM Peng Fan (OSS) wrote: > > > Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM > > > > On Tue, Jun 15, 2021 at 6:05 AM Peng Fan (OSS) > > wrote: > > > > > > > > > On 2021/6/15 3:29, Adam Ford wrote: > > > > On Mon, Jun 14, 2021 at 1:07 PM Adam Ford > > wrote: > > > >> > > > >> On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) > > wrote: > > > >>> > > > >>> From: Peng Fan > > > >>> > > > >>> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we > > add > > > >>> that support in this driver. > > > >>> > > > >>> Reviewed-by: Abel Vesa > > > >>> Signed-off-by: Peng Fan > > > >> > > > >> Maybe my TF-A is too old, but I am not able to wake the device from > > > >> suspend-to-ram with this series. I used the device tree from [1] > > > >> to enable both the GPCv2 and the blk-ctl stuff. > > > >> > > > >> [1] - > > > >> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp > > > >> > > atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604 > > > >> > > 111005.6804-1-peng.fan%40oss.nxp.com%2F&data=04%7C01%7Cpeng. > > fan > > > >> %40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc > > 2b4c6fa92 > > > >> > > cd99c5c301635%7C0%7C0%7C637594364693096718%7CUnknown%7CTWF > > pbGZsb3d8 > > > >> > > eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3 > > D% > > > >> > > 7C1000&sdata=owV810qvJWHnaoav%2BZDlpd%2FmjALiZkk0uWM44gqj > > jQ8%3D > > > >> &reserved=0 > > > >> > > > >> I based both off Shawn's for-next branch. > > > > > > > > I tried to enable USB with the GPCv2 stuff pulled into Shawn's > > > > for-next branch, and my board hangs when USB is loaded, but USB > > > > doesn't use blk-ctl, it just uses GPCv2. > > > > > > > > I looked at some of the changes with GPCv2, and I noticed a comment > > > > in the GPCv2 function called imx_pgc_power_up. The comment reads: > > > > > > > > /* > > > > * ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK, > > reg_val, > > > > * (reg_val & domain->bits.hskack), 0, > > > > * USEC_PER_MSEC); > > > > * Technically we need the commented code to wait handshake. But that > > > > needs > > > > * the BLK-CTL module BUS clk-en bit being set. > > > > * > > > > * There is a separate BLK-CTL module and we will have such a driver > > > > for it, > > > > * that driver will set the BUS clk-en bit and handshake will be > > > > triggered > > > > * automatically there. Just add a delay and suppose the handshake > > > > finish > > > > * after that. > > > > */ > > > > > > > > I didn't see a delay here despite the comment saying we should add one. > > > > > > > > With the blk-ctl enabled, I attempted to uncomment the above line of > > > > code without much success in preventing the board from hanging. > > > > > > > > If BUS clk-en bit needs to be set in order for the handshake to > > > > work, should all these power domains reference it to bring it up? > > > > If we decide against using the BUS clk-en bit, what should this delay be? > > > > > > It is only for power domain has mix and need delay for the handshake. > > > USB no need that handshake. > > > > Don't the OTG domains depend on hsiomix? > > > It works well with this change in dtsi. > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > index 0e01ff649956..e930ae3122ec 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > @@ -1087,6 +1087,7 @@ usbotg1: usb@32e40000 { > assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; > fsl,usbphy = <&usbphynop1>; > fsl,usbmisc = <&usbmisc1 0>; > + power-domains = <&pgc_otg1>; > status = "disabled"; > }; > > @@ -1106,6 +1107,7 @@ usbotg2: usb@32e50000 { > assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; > fsl,usbphy = <&usbphynop2>; > fsl,usbmisc = <&usbmisc2 0>; > + power-domains = <&pgc_otg2>; > status = "disabled"; > }; > Even with USB disabled, I was still having issues resuming from suspend-to-ram. I'll enable these and try again. adam > > Regards, > Peng. > > > > > > > > > Could you post a github branch, then I could give a look? > > > > No problem. > > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub. > > com%2Faford173%2Flinux%2Ftree%2Ffor-next&data=04%7C01%7Cpen > > g.fan%40nxp.com%7C29fe5fa2af704121c2d508d930b25126%7C686ea1d3bc > > 2b4c6fa92cd99c5c301635%7C0%7C0%7C637594364693106714%7CUnknow > > n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha > > WwiLCJXVCI6Mn0%3D%7C1000&sdata=6tiEiL7TMioVeb88WKHTYxVPxE > > MT1pboN%2FSMxiKA1yM%3D&reserved=0 > > > > thanks > > > > adam > > > > > > > > Thanks, > > > Peng. > > > > > > > > > > > adam > > > >> > > > >> adam > > > >> > > > >>> --- > > > >>> drivers/soc/imx/Makefile | 2 +- > > > >>> drivers/soc/imx/blk-ctl-imx8mm.c | 139 > > +++++++++++++++++++++++++++++++ > > > >>> 2 files changed, 140 insertions(+), 1 deletion(-) > > > >>> create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c > > > >>> > > > >>> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile > > > >>> index d3d2b49a386c..c260b962f495 100644 > > > >>> --- a/drivers/soc/imx/Makefile > > > >>> +++ b/drivers/soc/imx/Makefile > > > >>> @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o > > > >>> endif > > > >>> obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o > > > >>> obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o > > > >>> -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o > > > >>> +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o > > blk-ctl-imx8mm.o > > > >>> diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c > > > >>> b/drivers/soc/imx/blk-ctl-imx8mm.c > > > >>> new file mode 100644 > > > >>> index 000000000000..59443588f892 > > > >>> --- /dev/null > > > >>> +++ b/drivers/soc/imx/blk-ctl-imx8mm.c > > > >>> @@ -0,0 +1,139 @@ > > > >>> +// SPDX-License-Identifier: GPL-2.0 > > > >>> +/* > > > >>> + * Copyright 2021 NXP > > > >>> + */ > > > >>> + > > > >>> +#include > > > >>> +#include > > > >>> +#include > > > >>> +#include > > > >>> +#include > > > >>> +#include > > > >>> +#include > > > >>> +#include > > > >>> +#include > > > >>> +#include #include > > > >>> +#include #include #include > > > >>> + > > > >>> + > > > >>> +#include "blk-ctl.h" > > > >>> + > > > >>> +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN > > BIT(6) > > > >>> +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN > > BIT(5) > > > >>> +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN > > BIT(4) > > > >>> +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN > > BIT(3) > > > >>> +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN > > GENMASK(2, 0) > > > >>> + > > > >>> +#define MEDIA_BLK_BUS_PD_MASK > > BIT(12) > > > >>> +#define MEDIA_BLK_MIPI_CSI_PD_MASK > > GENMASK(11, 10) > > > >>> +#define MEDIA_BLK_MIPI_DSI_PD_MASK > > GENMASK(9, 8) > > > >>> +#define MEDIA_BLK_LCDIF_PD_MASK > > GENMASK(7, 6) > > > >>> +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK > > GENMASK(5, 0) > > > >>> + > > > >>> +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = { > > > >>> + IMX_BLK_CTL_PD("CSI_BRIDGE", NULL, > > IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4, > > > >>> + MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, > > MEDIA_BLK_CSI_BRIDGE_SFT_EN, > > > >>> + IMX_BLK_CTL_PD_RESET), > > > >>> + IMX_BLK_CTL_PD("LCDIF", NULL, > > IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4, > > > >>> + MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0), > > > >>> + IMX_BLK_CTL_PD("MIPI_DSI", "mipi", > > IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4, > > > >>> + MEDIA_BLK_MIPI_DSI_PD_MASK, 0, > > MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN, > > > >>> + IMX_BLK_CTL_PD_RESET), > > > >>> + IMX_BLK_CTL_PD("MIPI_CSI", "mipi", > > IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4, > > > >>> + MEDIA_BLK_MIPI_CSI_PD_MASK, 0, > > > >>> + > > MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | > > MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN, > > > >>> + IMX_BLK_CTL_PD_RESET), > > > >>> + IMX_BLK_CTL_PD("DISPMIX_BUS", "dispmix", > > IMX8MM_BLK_CTL_PD_DISPMIX_BUS, 0x4, > > > >>> + MEDIA_BLK_BUS_PD_MASK, 0, > > MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN, > > > >>> + IMX_BLK_CTL_PD_HANDSHAKE | > > > >>> +IMX_BLK_CTL_PD_RESET) }; > > > >>> + > > > >>> +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = { > > > >>> + IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", > > IMX8MM_BLK_CTL_PD_VPU_G2, 0x4, > > > >>> + BIT(0), 0, BIT(0), > > IMX_BLK_CTL_PD_RESET), > > > >>> + IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", > > IMX8MM_BLK_CTL_PD_VPU_G1, 0x4, > > > >>> + BIT(1), 0, BIT(1), > > IMX_BLK_CTL_PD_RESET), > > > >>> + IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", > > IMX8MM_BLK_CTL_PD_VPU_H1, 0x4, > > > >>> + BIT(2), 0, BIT(2), > > IMX_BLK_CTL_PD_RESET), > > > >>> + IMX_BLK_CTL_PD("VPU_BLK_CTL_BUS", "vpumix", > > IMX8MM_BLK_CTL_PD_VPU_BUS, 0x4, > > > >>> + BIT(2), 0, BIT(2), > > IMX_BLK_CTL_PD_HANDSHAKE > > > >>> +| IMX_BLK_CTL_PD_RESET) }; > > > >>> + > > > >>> +static const struct regmap_config imx8mm_blk_ctl_regmap_config = { > > > >>> + .reg_bits = 32, > > > >>> + .reg_stride = 4, > > > >>> + .val_bits = 32, > > > >>> + .max_register = 0x30, > > > >>> + .fast_io = true, > > > >>> +}; > > > >>> + > > > >>> +static const struct imx_blk_ctl_dev_data > > imx8mm_vpumix_blk_ctl_dev_data = { > > > >>> + .pds = imx8mm_vpumix_blk_ctl_pds, > > > >>> + .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds), > > > >>> + .max_num = IMX8MM_BLK_CTL_PD_VPU_MAX, > > > >>> + .hw_hsk = &imx8mm_vpumix_blk_ctl_pds[3], > > > >>> + .config = imx8mm_blk_ctl_regmap_config, > > > >>> + .name = "imx-vpumix-blk-ctl", }; > > > >>> + > > > >>> +static const struct imx_blk_ctl_dev_data > > imx8mm_dispmix_blk_ctl_dev_data = { > > > >>> + .pds = imx8mm_dispmix_blk_ctl_pds, > > > >>> + .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds), > > > >>> + .max_num = IMX8MM_BLK_CTL_PD_DISPMIX_MAX, > > > >>> + .hw_hsk = &imx8mm_dispmix_blk_ctl_pds[4], > > > >>> + .config = imx8mm_blk_ctl_regmap_config, > > > >>> + .name = "imx-dispmix-blk-ctl", }; > > > >>> + > > > >>> +static int imx8mm_blk_ctl_probe(struct platform_device *pdev) { > > > >>> + struct device *dev = &pdev->dev; > > > >>> + const struct imx_blk_ctl_dev_data *dev_data = > > of_device_get_match_data(dev); > > > >>> + struct regmap *regmap; > > > >>> + struct imx_blk_ctl *ctl; > > > >>> + void __iomem *base; > > > >>> + > > > >>> + ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL); > > > >>> + if (!ctl) > > > >>> + return -ENOMEM; > > > >>> + > > > >>> + base = devm_platform_ioremap_resource(pdev, 0); > > > >>> + if (IS_ERR(base)) > > > >>> + return PTR_ERR(base); > > > >>> + > > > >>> + regmap = devm_regmap_init_mmio(dev, base, > > &dev_data->config); > > > >>> + if (IS_ERR(regmap)) > > > >>> + return PTR_ERR(regmap); > > > >>> + > > > >>> + ctl->regmap = regmap; > > > >>> + ctl->dev = dev; > > > >>> + mutex_init(&ctl->lock); > > > >>> + > > > >>> + ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks); > > > >>> + if (ctl->num_clks < 0) > > > >>> + return ctl->num_clks; > > > >>> + > > > >>> + dev_set_drvdata(dev, ctl); > > > >>> + ctl->dev_data = dev_data; > > > >>> + > > > >>> + return imx_blk_ctl_register(dev); } > > > >>> + > > > >>> +static const struct of_device_id imx_blk_ctl_of_match[] = { > > > >>> + { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = > > &imx8mm_vpumix_blk_ctl_dev_data }, > > > >>> + { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = > > &imx8mm_dispmix_blk_ctl_dev_data }, > > > >>> + { /* Sentinel */ } > > > >>> +}; > > > >>> +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match); > > > >>> + > > > >>> +static struct platform_driver imx_blk_ctl_driver = { > > > >>> + .probe = imx8mm_blk_ctl_probe, > > > >>> + .driver = { > > > >>> + .name = "imx8mm-blk-ctl", > > > >>> + .of_match_table = > > of_match_ptr(imx_blk_ctl_of_match), > > > >>> + .pm = &imx_blk_ctl_pm_ops, > > > >>> + }, > > > >>> +}; > > > >>> +module_platform_driver(imx_blk_ctl_driver); > > > >>> -- > > > >>> 2.30.0 > > > >>> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel