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From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: Richard Zhu <hongxing.zhu@nxp.com>, Lucas Stach <l.stach@pengutronix.de>
Cc: "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	dl-linux-imx <linux-imx@nxp.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Chris Healy <cphealy@gmail.com>
Subject: Re: [EXT] [PATCH] PCI: imx6: Add L1SS support for i.MX8MQ
Date: Thu, 16 Jan 2020 06:37:09 -0800	[thread overview]
Message-ID: <CAHQ1cqFg_EcLRUtOO65P-K4hFdkx0OyzxOupqdqwicnhROiZ6A@mail.gmail.com> (raw)
In-Reply-To: <AM0PR0402MB35708B48AF371E81BFCCED158C370@AM0PR0402MB3570.eurprd04.prod.outlook.com>

On Tue, Jan 14, 2020 at 7:26 PM Richard Zhu <hongxing.zhu@nxp.com> wrote:
>
>
> > -----Original Message-----
> > From: Andrey Smirnov <andrew.smirnov@gmail.com>
> > Sent: 2020年1月15日 1:03
> > To: linux-pci@vger.kernel.org
> > Cc: Andrey Smirnov <andrew.smirnov@gmail.com>; Lorenzo Pieralisi
> > <lorenzo.pieralisi@arm.com>; Bjorn Helgaas <bhelgaas@google.com>; Chris
> > Healy <cphealy@gmail.com>; Lucas Stach <l.stach@pengutronix.de>; Richard
> > Zhu <hongxing.zhu@nxp.com>; dl-linux-imx <linux-imx@nxp.com>;
> > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org
> > Subject: [EXT] [PATCH] PCI: imx6: Add L1SS support for i.MX8MQ
> >
> > Caution: EXT Email
> >
> > Add code to configure PCI IP block to utilize supported ASPM features.
> >
> > Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> [Richard Zhu]  HI Andrey:
> This patch does the regmap to the src region, right?

Indeed.

> How about to add another reset to manipulate the *_OVERRIDE bit.
> Just like the following bits.
>                         resets = <&src IMX8MQ_RESET_PCIEPHY>,
>                                  <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
>                                  <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
>                         reset-names = "pciephy", "apps", "turnoff";
>

Last time I talked to Philipp Zabel (maintainer of reset subsystem) he
made it pretty clear that he though that exposing those PCIe related
bits via reset subsystem (for both imx7 and imx8mq) was a mistake and
going forward he'd like to see only true reset functionality to be
exposed that way. IMX8MQ_PCIE_CTRL_APPS_CLK_REQ is definitely not a
reset line, so the case for adding it to reset driver is even weaker.

Lucas, do you mind sharing your thoughts on this?

Thanks,
Andrey Smirnov

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  reply	other threads:[~2020-01-16 14:37 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-14 17:02 [PATCH] PCI: imx6: Add L1SS support for i.MX8MQ Andrey Smirnov
2020-01-15  3:25 ` [EXT] " Richard Zhu
2020-01-16 14:37   ` Andrey Smirnov [this message]
2020-01-17 13:52     ` Lucas Stach
2020-02-20 16:39 ` Andrey Smirnov

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