From: illusionist.neo@gmail.com (Shubham Bansal)
To: linux-arm-kernel@lists.infradead.org
Subject: arch: arm: bpf: Converting cBPF to eBPF for arm 32 bit
Date: Wed, 15 Mar 2017 17:43:44 +0530 [thread overview]
Message-ID: <CAHgaXdJL92XRjHae2Nb9j9SerSe65=N=ErDHTQf23sdBxwthzw@mail.gmail.com> (raw)
In-Reply-To: <CAGXu5jLo8UvpNSQZBHjWZoO959ha6KFQxFzmg7SK44wz=R_QSg@mail.gmail.com>
Hi kees,
> It seems like you're suggesting truncating the 64-bit register values?
> I think your best solution is going to be to use a memory scratch
> space and build 64-bit operations using 32-bit registers and memory
> operations.
Yes. I was suggesting the truncating of 64-bit register values, but
for 32 bit operands only. So when I am truncating the BPF register, I
am getting rid of non-useful bytes only.
Can you explain how to use memory scratch space and build 64-bit
operations using 32-bit registers and memory operations ? A small
example would help a lot.
>> - Similarly, For all BPF_ALU class instructions.
>> - For BPF_ADD, I will mask the addition result to 32 bit only.
>> I am not sure, Overflow might be a problem.
>> - For BPF_SUB, I will mask the subtraction result to 32 bit only.
>> I am not sure, Underflow might be problem.
>> - For BPF_MUL, similar to BPF_ADD. Overflow Problem ?
>> - For BPF_DIV, 32 bit masking should be fine, I guess.
>> - For BPF_OR, BPF_AND, BPF_XOR, BPF_LSH, BPF_RSH, BPF_MOD 32 bit
>> masking should be fine.
>> - For BPF_NEG and BPF_ARSH, might be a problem because of the sign bit.
>> - For BPF_END, 32 bit masking should work fine.
>> Let me know if any of the above point is wrong or need your suggestion.
>>
>> - Although, for ALU instructions, there is a big problem of register
>> flag manipulations. Generally, architecture's ABI takes care of this
>> part but as we are doing 64 bit Instructions emulation(kind of) on 32
>> bit machine, it needs to be done manually. Does that sound correct ?
>
> You can't truncate, but you'll have to build 64-bit ops using 32-bit registers.
A small example would help a lot.
>
>>
>> - I am not JITing BPF_ALU64 class instructions as of now. As we have to
>> take care of atomic instructions and race conditions with these
>> instruction which looks complicated to me as of now. Will try to figure out
>> this part and implement it later. Currently, I will just let it be
>> interpreted by the ebpf interpreter.
>>
>> - For BPF_JMP class, I am assuming that, although eBPF is 64 bit ABI,
>> the address pointers on 32 bit arch like arm will be of 32 bit only.
>> So, for BPF_JMP, masking the 64 bit destination address to 32 bit
>> should do the trick and no address will be corrupted in this way. Am I
>> correct to assume this ?
>> Also, I need to check for address getting out of the allowed memory
>> range.
>
> That's probably true, but the JIT should likely detect a truncation
> here, if you're going to depend on it, and reject the BPF.
Okay. So I guess I have to use memory for this as well ?
An example would be great.
>
>> - For BPF_LD, BPF_LDX, BPF_ST and BPF_STX class instructions, I am
>> assuming the same thing as above - All addresses and pointers are 32
>> bit - which can be taken care just by maksing the eBPF register
>> values. Does that sound correct ?
>> Also, I need to check for the address overflow, address getting out
>> of the allowed memory range and things like that.
>
> I'd say, get something working and send a patch -- that's likely the
> best way to get more detailed feedback. :)
I would love to but I have to understand what to implement first.
-Shubham
next prev parent reply other threads:[~2017-03-15 12:13 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-30 10:38 arch: arm: bpf: Converting cBPF to eBPF for arm 32 bit Shubham Bansal
2017-01-30 21:57 ` Kees Cook
[not found] ` <CAHgaXd+nj69n-Xf46N=4M-j-0hKHVrrLfsvRZCG=2CCAtVF6ZA@mail.gmail.com>
[not found] ` <CAGXu5j+NSLomuSgD40kys+pWc+J9aB6Bbk_gSP9Lp_ScimQn_w@mail.gmail.com>
2017-02-01 13:01 ` Shubham Bansal
[not found] ` <76621BFF-B30B-4417-AB2B-DB21CA6092D9@netronome.com>
2017-02-03 7:04 ` Shubham Bansal
2017-02-03 8:25 ` nick viljoen
2017-02-08 7:29 ` Shubham Bansal
2017-02-08 19:41 ` Kees Cook
2017-03-15 12:13 ` Shubham Bansal [this message]
2017-03-15 21:55 ` David Miller
2017-03-28 20:49 ` Shubham Bansal
2017-03-29 0:00 ` Daniel Borkmann
2017-03-30 14:04 ` Shubham Bansal
2017-04-06 11:05 ` Shubham Bansal
2017-04-06 12:51 ` Daniel Borkmann
2017-05-06 16:48 ` Shubham Bansal
2017-05-06 18:38 ` David Miller
2017-05-06 20:27 ` Shubham Bansal
2017-05-06 22:17 ` Shubham Bansal
2017-05-09 20:12 ` Shubham Bansal
2017-05-09 20:19 ` David Miller
2017-05-09 20:25 ` Daniel Borkmann
[not found] <CAHgaXdKsO2xoKYp7g91g+n+d_1KHSSByLjzBB-WjVXSjhB7qxw@mail.gmail.com>
[not found] ` <20170510.212952.1440495072777358778.davem@davemloft.net>
[not found] ` <CAHgaXdK8LEEUPm4jTRRzCnjwdWAauHmmB=caZsSFY8MmStH89Q@mail.gmail.com>
[not found] ` <20170510.215218.2185526627014393313.davem@davemloft.net>
[not found] ` <CAHgaXdKZ_v+iO7uqEDx7PA7D+xcp1FngGvJ1SRSsGXNQ-iWWDQ@mail.gmail.com>
2017-05-11 9:32 ` Shubham Bansal
2017-05-11 15:30 ` Kees Cook
2017-05-13 21:38 ` Shubham Bansal
2017-05-15 17:44 ` Kees Cook
2017-05-15 19:55 ` Daniel Borkmann
2017-05-20 20:01 ` Shubham Bansal
2017-05-22 13:01 ` Daniel Borkmann
2017-05-22 17:04 ` Shubham Bansal
2017-05-22 20:05 ` Kees Cook
2017-05-23 2:58 ` Shubham Bansal
2017-05-23 4:27 ` Kees Cook
2017-05-22 18:58 ` Kees Cook
2017-05-22 19:08 ` Florian Fainelli
2017-05-23 3:34 ` Shubham Bansal
2017-05-23 4:22 ` Kees Cook
2017-05-23 5:03 ` Shubham Bansal
2017-05-23 5:35 ` Kees Cook
[not found] ` <CAHgaXdJa9uJYO3bODuzDRaqOas0i=zMk0jioWFXKm_=UJRtVrw@mail.gmail.com>
2017-05-23 19:32 ` Kees Cook
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