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[209.85.208.178]) by smtp.gmail.com with ESMTPSA id j3sm646743lfh.264.2021.08.27.10.16.43 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Aug 2021 10:16:43 -0700 (PDT) Received: by mail-lj1-f178.google.com with SMTP id h1so12618705ljl.9 for ; Fri, 27 Aug 2021 10:16:43 -0700 (PDT) X-Received: by 2002:a05:651c:908:: with SMTP id e8mr8541721ljq.507.1630084603229; Fri, 27 Aug 2021 10:16:43 -0700 (PDT) MIME-Version: 1.0 References: <20210826131747.GE26318@willie-the-truck> <20210827074041.GA24309@lst.de> <20210827171041.GA28149@lst.de> In-Reply-To: <20210827171041.GA28149@lst.de> From: Linus Torvalds Date: Fri, 27 Aug 2021 10:16:27 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [GIT PULL] arm64 fix for 5.14 To: Christoph Hellwig Cc: Will Deacon , Catalin Marinas , Linux ARM , Linux Kernel Mailing List , Android Kernel Team X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210827_101647_574280_A180F816 X-CRM114-Status: GOOD ( 15.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Aug 27, 2021 at 10:10 AM Christoph Hellwig wrote: > > They CCed me on their earlier discussion, but I did not catch up on it > until you responded to the pull request If I understood it correct it > was about a platform device mapping a MMIO region (like a PCI bar), > but something about section alignment cause pfn_valid to mistrigger. Yeah, so I can easily see the maxpfn numbers can easily end up being rounded up to a whole memory section etc. I think my suggested solution should JustWork(tm) - exactly because if the area is then in that "this pfn is valid" area, it will double-check the actual underlying page. That said, I think x86 avoids the problem another way - by just making sure max_pfn is exact. That works too, as long as there are no holes in the RAM map that might be used for PCI BAR's. So I think arm could fix it that way too, depending on their memory layout. (x86 has that traditional hole at A0000-FFFFF, but it's special enough that it presumably is never an issue). Linus _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel