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[209.85.167.49]) by smtp.gmail.com with ESMTPSA id h15sm741485ljc.96.2021.08.27.10.03.46 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Aug 2021 10:03:46 -0700 (PDT) Received: by mail-lf1-f49.google.com with SMTP id m18so1582842lfl.10 for ; Fri, 27 Aug 2021 10:03:46 -0700 (PDT) X-Received: by 2002:a05:6512:2091:: with SMTP id t17mr7463548lfr.253.1630083825642; Fri, 27 Aug 2021 10:03:45 -0700 (PDT) MIME-Version: 1.0 References: <20210826131747.GE26318@willie-the-truck> <20210827074041.GA24309@lst.de> In-Reply-To: <20210827074041.GA24309@lst.de> From: Linus Torvalds Date: Fri, 27 Aug 2021 10:03:29 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [GIT PULL] arm64 fix for 5.14 To: Christoph Hellwig Cc: Will Deacon , Catalin Marinas , Linux ARM , Linux Kernel Mailing List , Android Kernel Team X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210827_100349_438564_8BE19A85 X-CRM114-Status: GOOD ( 18.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Aug 27, 2021 at 12:40 AM Christoph Hellwig wrote: > > > In a PC world that would be (for example) the legacy PCI space at > > 0xa0000-0xfffff, but I could easily imagine other platforms having > > other situations. > > So what would be the correct check for "this is not actually page backed > normal RAM"? It would probably be interesting to have the arm people explain the call chain for the warning that caused that revert, so we'd have a very concrete example of the situation that goes wrong, but taking a wild stab at it, the code might be something like /* Don't allow RAM to be mapped */ if (WARN_ON_ONCE(phys_addr_is_ram(phys_addr))) return DMA_MAPPING_ERROR; and then having something like static inline bool phys_addr_is_ram(phys_addr_t phys_addr) { unsigned long pfn = PHYS_PFN(phys_addr); if (!pfn_valid(pfn)) return false; return is_zero_pfn(pfn) || !PageReserved(pfn_to_page(pfn)); } might be close to right. The ARM code actually uses that complex pfn_to_section_nr() and memblock_is_memory() etc. That seems a bit of an overkill, since the memblock code should have translated all that into being reserved. But again, I don't actually know exactly what triggered the issue on ARM, so the above is just my "this seems to be a more proper check" suggestion. Will? Linus _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel