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bh=S3az4aOopeu8PToPYTiB4gPF4tOtIx0O5/U+DExxUeI=; b=Ck3aAJ7c1uK2GtibjQl6gNBALywLcA0BMYIp4B00eb+rXZsjEC8d0+NLbYl89kg8+W PGPqR0q3lNmDAjRregGBniXLXyhlFhcWB3iECxWDAUe/rTK7v3B/U6SdDnTxEjq1xLv3 KS5lYRTpdHq2x8yjvUH48kVrLG5DKx6Nr1qKwlVATC3J0b3ELdfa7zDUWuO7m7Lkj2eM 0yoZ/9Kg2C9ovlrVDwQTugs5byqE2MapiIQUFmjVi/0b4Ndls1jqi7l6ZnLUgVsLJb1v 65Ai2Ovpp5guqGDv2sCOEYT8JAwuYhLrfTrqSR1KYJV93xdSqy44WIf5o+85d6jtouOu GyKg== X-Gm-Message-State: AOAM533rErBkINSmt2xwmBK4tLnh5luDI+QXIIy3WUpI32UzmK1uF3jn PGQ6409ABletjzwPaFaDQ+EWP8ElFwR7aSroiC8= X-Google-Smtp-Source: ABdhPJy9StB6CLmDduXztdxo3V1PZk9GmaxBlE5HP/AnxW3AU7T3ysCXLYhWRwW9+4Zx+8hH7HpQvITx5FQR/cXIOCY= X-Received: by 2002:a63:cd11:: with SMTP id i17mr10333646pgg.74.1621423913678; Wed, 19 May 2021 04:31:53 -0700 (PDT) MIME-Version: 1.0 References: <20210517200002.6316-1-dariobin@libero.it> In-Reply-To: <20210517200002.6316-1-dariobin@libero.it> From: Andy Shevchenko Date: Wed, 19 May 2021 14:31:37 +0300 Message-ID: Subject: Re: [PATCH v2 0/2] am335x: set pinmux registers from pins debug file To: Dario Binacchi Cc: Linux Kernel Mailing List , Haojian Zhuang , Linus Walleij , Tony Lindgren , linux-arm Mailing List , "open list:GPIO SUBSYSTEM" , Linux OMAP Mailing List X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210519_043155_343809_5F9F6E47 X-CRM114-Status: GOOD ( 16.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, May 19, 2021 at 3:58 AM Dario Binacchi wrote: > > > The patch was born from the need to change the slew rate of the LCD pins > of a custom AM335x board during EMC tests. The AM335x, as described in a > note in section 9.1 of its reference manual [1], is unable to write > pinmux registers from user space. The series now makes it possible to > write these registers from the pins debug file. Even for debugfs it would be nice to have a piece of documentation. Because pin control is a quite sensitive area and if something goes wrong, it may damage the hardware. > [1] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf -- With Best Regards, Andy Shevchenko _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel