From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3701ECAAA1 for ; Fri, 9 Sep 2022 17:43:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=T3eP+FIHRg0NlV63+e2NUk15k+bHxBu4aXfpzQbYhcw=; b=1Bu9iH6gsRq7dz W5ONGr+vrNe9tVgDTCTdhGBZZ7hid95ZANVI+1WjqXrPEsqTwKp9QaB4AG1DUs35l8OJYudA86qSh cVHro5Dl9JiIziY+y4XsC9aL430ONftNdQkxpwfzp9INiI6bLkkRnCaE30u1TtA7Gb4fdZoNYiPxh o3r02hFnyubD2A9fhPaXAp04SxGGJfcnDxuPpU4ZqEf3FaD228fim3exsnSrNYWqNWnp3zFGwb/A3 XD3dWAEI2YVtioA3KxnHl96sTUVfGcPH94eUX/2dX6SWGV9nLz3R6W67EkGkJsuL6WfTYQQGHP7NJ 9bzryTJrLr5PHyrnaMHQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWi1H-000oYS-Ny; Fri, 09 Sep 2022 17:42:23 +0000 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWi1E-000oTG-N9 for linux-arm-kernel@lists.infradead.org; Fri, 09 Sep 2022 17:42:22 +0000 Received: by mail-pl1-x62c.google.com with SMTP id p18so2448125plr.8 for ; Fri, 09 Sep 2022 10:42:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gateworks-com.20210112.gappssmtp.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date; bh=i0TWXvsMdzImF9hLkcZNKk+2MjIILmGHGg2qkEi7CcA=; b=ZBI1LtnkLZ2w2b7p6oHqxdChxFGPWJXfmp5TlVlDmHeHCijJXtQfjz7IHI2IriPIMF f95h64zEmTxv1+DXoTxsj6cRwdC1+GnvPm0JrTms/AGZLOcHNFuEBk6AhT6kPYqfHFmE 6bDNh1tlHqdpcSzTgOefQ9CgJD2IqhiECkFP9CSIYs1N1sGMsa2Ei8kNs6yZox26GAtZ iONIXHmphNPHtiCxrPavb7H6I0KJdDUDNNge9BQiMEJ4nTIuBKozvhWHK9CoL1uDc8Cf JL94MJojJBhXLy0AOoH6zfaglKh9jHeaGHRZV1XD/Bfy2L5PWc8m8Yjb06WaoaYOVFeJ M7TA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=i0TWXvsMdzImF9hLkcZNKk+2MjIILmGHGg2qkEi7CcA=; b=r4curTMyqeNHRfFayA3iknUJGcdEz4nnRQ2pi//oxh8+j7IXJuDpe/BWYOeCiQ6Kfd Lyc8fgilWPweZ4fSfBLEOm76uXllZ69r6lic6Tp7ByBFsI0VwBRKBL/URLBpWaVHi0xp Suiz7onzpzVKFOMDsnkBiNCX2VwP03ieAB7+E5CVrXzUzoZ9Z7dfPUdN+vpNw5bBOpQi v93xUC2Z6zz83Ra0Eg2eV+vlfNFANasVyqyLWlC1OsmgD63kvosPFKIndLrASVZF4hgK 8jdf4jjsPt9dYpDpYyVmrJodMoDQSmnGbYpX1lgzdfiCPvILH7mraWgLr3rx3KszAQr8 7ppw== X-Gm-Message-State: ACgBeo0W/6+tGDAKqbLJUY0K7WLbOp9ASB4/j987xdwqqrKxgdMp31v5 KrGLXbqLmeQxURq4t0FB+IvbBHG/NR23KYWw3zCBKBS0rfr+6w== X-Google-Smtp-Source: AA6agR7PVoOHHD6bpgJ/hR/7PXLQu2R8LF81Vy2s6/XMli+cSHaT4YUyimg9nypVDN3AAMWlgQYuQwo3RVsQWwQxlFs= X-Received: by 2002:a17:902:be02:b0:172:d409:e057 with SMTP id r2-20020a170902be0200b00172d409e057mr14704787pls.90.1662745334819; Fri, 09 Sep 2022 10:42:14 -0700 (PDT) MIME-Version: 1.0 References: <20220908154903.4100386-1-tharvey@gateworks.com> <2530681.Lt9SDvczpP@steina-w> In-Reply-To: <2530681.Lt9SDvczpP@steina-w> From: Tim Harvey Date: Fri, 9 Sep 2022 10:42:03 -0700 Message-ID: Subject: Re: [PATCH] arm64: dts: imx8mp-venice-gw74xx: add PCIe support To: Alexander Stein Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, NXP Linux Team , Fabio Estevam , Pengutronix Kernel Team , Sascha Hauer , Shawn Guo , Krzysztof Kozlowski , Rob Herring X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220909_104220_779907_067B9B67 X-CRM114-Status: GOOD ( 20.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Sep 8, 2022 at 10:59 PM Alexander Stein wrote: > > Hi Tim, > > Am Donnerstag, 8. September 2022, 17:49:03 CEST schrieb Tim Harvey: > > Add PCIe support on the Gateworks GW74xx board. While at it, > > fix the related gpio line names from the previous incorrect values. > > > > Signed-off-by: Tim Harvey > > --- > > .../dts/freescale/imx8mp-venice-gw74xx.dts | 40 +++++++++++++++++-- > > 1 file changed, 37 insertions(+), 3 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts > > b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts index > > e0fe356b662d..7644db61d631 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts > > @@ -8,6 +8,7 @@ > > #include > > #include > > #include > > +#include > > > > #include "imx8mp.dtsi" > > > > @@ -100,6 +101,12 @@ led-1 { > > }; > > }; > > > > + pcie0_refclk: pcie0-refclk { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <100000000>; > > + }; > > + > > pps { > > compatible = "pps-gpio"; > > pinctrl-names = "default"; > > @@ -215,8 +222,8 @@ &gpio1 { > > &gpio2 { > > gpio-line-names = > > "", "", "", "", "", "", "", "", > > - "", "", "", "", "", "", "", "", > > - "pcie3_wdis#", "", "", "pcie1_wdis@", "pcie2_wdis#", "", > "", "", > > + "", "", "", "", "", "", "pcie3_wdis#", "", > > + "", "", "pcie2_wdis#", "", "", "", "", "", > > "", "", "", "", "", "", "", ""; > > }; > > > > @@ -562,6 +569,28 @@ &i2c4 { > > status = "okay"; > > }; > > > > +&pcie_phy { > > + fsl,refclk-pad-mode = ; > > + fsl,clkreq-unsupported; > > + clocks = <&pcie0_refclk>; > > + clock-names = "ref"; > > + status = "okay"; > > +}; > > + > > +&pcie { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_pcie0>; > > + reset-gpio = <&gpio2 17 GPIO_ACTIVE_LOW>; > > + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, > > + <&clk IMX8MP_CLK_PCIE_ROOT>, > > + <&clk IMX8MP_CLK_HSIO_AXI>; > > + clock-names = "pcie", "pcie_aux", "pcie_bus"; > > With the still pending dt-binding patch at [1] the clock order shall be > "pcie", "pcie_bus", "pcie_phy". > > Best regards, > Alexander > > [1] https://lore.kernel.org/lkml/20220822184701.25246-2-Sergey.Semin@baikalelectronics.ru/ > Alexander, Interesting... the imx8pm-evk PCIe patch was accepted with the bindings I used which are current. So I suppose if/when the patch you pointed to gets accepted some existing bindings will need to change to be compliant. Best Regards, Tim _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel