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s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=TqH714PYK9AN3xEW+SZ/vpTilG38WEqVTfd4SHibhpU=; b=KdMv6+MqRZhTgk0WH/w9y3kvfSLCGaUQqlxiz6fanX0dGEx/07yfqnZRD0rgAzimT/ tu6luhRRs3QIvINMIBGZFFfBPXBtpZcHrfrXb/c5IBOITfNI7fKvied9Kj8p6wzR+f49 fgyV24rueSimLTaO2TttQBRqAklV3jc1C5Hq+L2dhBSI/pDAnufDaZw1ZJmMEOyeg2BG npY4ZDuxbA9kH8mJGldIXASsJNrp2+tbt7I7n8xDzOMdVZoSSUDxyz4p98uN6BT2hKeB zkje6PNM/SfePw7eV0hn3XFnwWMeag3OA2GYG+nqhJWdJTjNknOmOOvcpvjbRs98mBYE 2RKg== X-Gm-Message-State: AOAM533TOj9cdma8MkeaZSk0vyCAtp5mu2Szl1RPIoT8g7dS2kios2Hz 21GsEfadUiNURFAodMmxeuqvJakzok6ULgeV4njn2g== X-Google-Smtp-Source: ABdhPJxYWzDRdgGlzCf8uk9kNIzYgdLFZbmwDSF/f2ysaeKZwjAgLQjIZthiqy8sag3DXUvMAfB6+kPI+hUZMBj9faA= X-Received: by 2002:a7b:c7d3:: with SMTP id z19mr8124506wmk.31.1610705888619; Fri, 15 Jan 2021 02:18:08 -0800 (PST) MIME-Version: 1.0 References: <20210115083933.50522-1-zhang.lyra@gmail.com> In-Reply-To: <20210115083933.50522-1-zhang.lyra@gmail.com> From: Mike Leach Date: Fri, 15 Jan 2021 10:17:57 +0000 Message-ID: Subject: Re: [PATCH] coresight: etm4x: add AMBA id for Cortex-A55 and Cortex-A75 To: Chunyan Zhang X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210115_051810_152657_D2160568 X-CRM114-Status: GOOD ( 19.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mathieu Poirier , Suzuki K Poulose , Coresight ML , Linux Kernel Mailing List , Chunyan Zhang , Bin Ji , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Chunyan, On Fri, 15 Jan 2021 at 08:39, Chunyan Zhang wrote: > > From: Bin Ji > > Add ETM amba id to support Cortex-A55(Ananke) and Cortex-A75(Promethus). > > Signed-off-by: Bin Ji > Signed-off-by: Chunyan Zhang > --- > drivers/hwtracing/coresight/coresight-etm4x-core.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index b20b6ff17cf6..66c6641c71ea 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -1709,9 +1709,11 @@ static int etm4_remove(struct amba_device *adev) > > static const struct amba_id etm4_ids[] = { > CS_AMBA_ID(0x000bb95d), /* Cortex-A53 */ > + CS_AMBA_ID(0x000bbd05), /* Cortex-A55 */ Use AMBA_UCI_ID(). See UCI comment below. > CS_AMBA_ID(0x000bb95e), /* Cortex-A57 */ > CS_AMBA_ID(0x000bb95a), /* Cortex-A72 */ > CS_AMBA_ID(0x000bb959), /* Cortex-A73 */ > + CS_AMBA_ID(0x000bbd0a), /* Cortex-A75 */ This AMBA ID is used for PMU, ETM, debug block and CTI for this core. Please use the CS_AMBA_UCI_ID macro to correctly identify this component. See CoreSight 3.0 Architecture Manual 3.0 (IHI 0029E) section B2.1.2 for an explanation of UCI. Regards Mike > CS_AMBA_UCI_ID(0x000bb9da, uci_id_etm4),/* Cortex-A35 */ > CS_AMBA_UCI_ID(0x000bbd0c, uci_id_etm4),/* Neoverse N1 */ > CS_AMBA_UCI_ID(0x000f0205, uci_id_etm4),/* Qualcomm Kryo */ > -- > 2.25.1 > > _______________________________________________ > CoreSight mailing list > CoreSight@lists.linaro.org > https://lists.linaro.org/mailman/listinfo/coresight -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. 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