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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=0J5p0MbR2bEpUCfICH6xdp5imi0dLtMRyP6mnTPI/+k=; b=LfY1wftLJaXxBAbA4t87lq5i5oNSiHnyr2/FJWYkE0LwOsUgH6H9oNbJ/+49FlhrWb JVPy8B/1XwUlci1q2NawlSyQv4uwiEGfSQAGslk2ce3nsBthlFayf+v9KvhFxwCT7Xiv vl38wfKBaAjQ6s6V1eQtbdhI4B4n+EPoh5MImjdhg+ukA6fsGnOBGWjhhFh9O0ZeDpn2 imnA89ykOATI4B1OYXTPOwsnxQe6RHxvxtnGKbRAVRTN3oKHNJZIk5lVuYehvAxNDIEl tpGZDCdZYbIGZ7tHNnCaFI8o/NQrKjNk5aFGPdz5gPtauPVWe3V5Jvisfj8h9SzZSmcf GIkQ== X-Gm-Message-State: ACrzQf0mjVvjHyCwlwSvczxf4FlnwVQXcvxFoj/Hmb3Z88YG6NcMpu7b CahJJutxJ6uduLxbJ5lxltqe92EgRUxAITALoi4vnQ== X-Google-Smtp-Source: AMsMyM6v2weV/Fdu3N0Bh6wAO2lrR1bMLaSlCLlNSbj8E6HaaXQrDXazFUiH4q0I1rXy6ekFB4TZ40s1/xO4X/uDcNA= X-Received: by 2002:a17:90b:4b4b:b0:20a:926f:3c2e with SMTP id mi11-20020a17090b4b4b00b0020a926f3c2emr5136641pjb.87.1665062570526; Thu, 06 Oct 2022 06:22:50 -0700 (PDT) MIME-Version: 1.0 References: <20220809223401.24599-1-mike.leach@linaro.org> <20220809223401.24599-14-mike.leach@linaro.org> <231e1e51-ab6c-2084-bb97-0594eb5fcbad@arm.com> In-Reply-To: <231e1e51-ab6c-2084-bb97-0594eb5fcbad@arm.com> From: Mike Leach Date: Thu, 6 Oct 2022 14:22:38 +0100 Message-ID: Subject: Re: [PATCH v3 13/13] coresight: trace-id: Add debug & test macros to Trace ID allocation To: Suzuki K Poulose Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, linux-perf-users@vger.kernel.org, leo.yan@linaro.org, quic_jinlmao@quicinc.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221006_062253_972343_941EF4DB X-CRM114-Status: GOOD ( 16.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 3 Oct 2022 at 12:06, Suzuki K Poulose wrote: > > On 09/08/2022 23:34, Mike Leach wrote: > > Adds in a number of pr_debug macros to allow the debugging and test of > > the trace ID allocation system. > > > > Signed-off-by: Mike Leach > > --- > > .../hwtracing/coresight/coresight-trace-id.c | 36 +++++++++++++++++++ > > 1 file changed, 36 insertions(+) > > > > diff --git a/drivers/hwtracing/coresight/coresight-trace-id.c b/drivers/hwtracing/coresight/coresight-trace-id.c > > index ac9092896dec..24c19ff493a9 100644 > > --- a/drivers/hwtracing/coresight/coresight-trace-id.c > > +++ b/drivers/hwtracing/coresight/coresight-trace-id.c > > @@ -69,6 +69,30 @@ static void coresight_trace_id_set_pend_rel(int id, struct coresight_trace_id_ma > > set_bit(id, id_map->pend_rel_ids); > > } > > > > +/* #define TRACE_ID_DEBUG 1 */ > > +#ifdef TRACE_ID_DEBUG > > +static char page_buf[PAGE_SIZE]; > > + > > +static void coresight_trace_id_dump_table(struct coresight_trace_id_map *id_map, > > + const char *func_name) > > +{ > > + pr_debug("%s id_map::\n", func_name); > > + bitmap_print_to_pagebuf(0, page_buf, id_map->used_ids, CORESIGHT_TRACE_IDS_MAX); > > + pr_debug("Avial= %s\n", page_buf); > > Could we not use %pb directly and skip the bitmap_print_to_pagebuf ? > > Suzuki In short, yes! Mike -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel