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Thu, 19 Sep 2019 06:37:11 -0700 (PDT) X-Gm-Message-State: APjAAAW8dgMQNJRE1bjCpAla3if5YuhWtSuHvyGBGjh2U/65RLc+KgKd HDUyzAhL/KhRwRw0Eu2F2wMfIv729E19BKYhQME= X-Google-Smtp-Source: APXvYqzlXvVrim8rTycGbIV+PmHAEsjEw4YXguoJ0i5mulID6kS2AA+pRkt/c/jlP2DTaZZMrey31vSOQlTtKW2gKOA= X-Received: by 2002:a5d:6b49:: with SMTP id x9mr6988060wrw.80.1568900230203; Thu, 19 Sep 2019 06:37:10 -0700 (PDT) MIME-Version: 1.0 References: <20190912140256.fwbutgmadpjbjnab@willie-the-truck> <20190916181800.7lfpt3t627byoomt@willie-the-truck> In-Reply-To: From: Guo Ren Date: Thu, 19 Sep 2019 21:36:58 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH RFC 11/14] arm64: Move the ASID allocator code in a separate file To: Anup Patel X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190919_063713_084149_3B2959CA X-CRM114-Status: GOOD ( 18.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "julien.thierry@arm.com" , "catalin.marinas@arm.com" , Palmer Dabbelt , Will Deacon , "christoffer.dall@arm.com" , Atish Patra , "julien.grall@arm.com" , "gary@garyguo.net" , "linux-riscv@lists.infradead.org" , Will Deacon , "kvmarm@lists.cs.columbia.edu" , "rppt@linux.ibm.com" , Christoph Hellwig , "aou@eecs.berkeley.edu" , Arnd Bergmann , "suzuki.poulose@arm.com" , "marc.zyngier@arm.com" , Paul Walmsley , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "iommu@lists.linux-foundation.org" , "james.morse@arm.com" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On Tue, Sep 17, 2019 at 11:42 AM Anup Patel wrote: > > > > With a reply stating that the patch "absolutely does not work" ;) > > This patch was tested on existing HW (which does not have ASID implementation) > and tested on QEMU (which has very simplistic Implementation of ASID). > > When I asked Gary Guo about way to get access to their HW (in same patch > email thread), I did not get any reply. After so many months passed, I now > doubt the his comment "absolutely does not work". > > > > What exactly do you want people to do with that? It's an awful lot of effort to > > review this sort of stuff and given that Guo Ren is talking about sharing page > > tables between the CPU and an accelerator, maybe you're better off > > stabilising Linux for the platforms that you can actually test rather than > > getting so far ahead of yourselves that you end up with a bunch of wasted > > work on patches that probably won't get merged any time soon. > > The intention of the ASID patch was to encourage RISC-V implementations > having ASID in HW and also ensure that things don't break on existing HW. > > I don't see our efforts being wasted in trying to make Linux RISC-V feature > complete and encouraging more feature rich RISC-V CPUs. > > Delays in merging patches are fine as long as people have something to try > on their RISC-V CPU implementations. > I'm the supporter of that patch: http://archive.lwn.net:8080/linux-kernel/20190329045111.14040-1-anup.patel@wdc.com/T/#u Because it implicit hw broadcast tlb invalidation optimization. Honestly it's not suitable for remote tlb flush with software IPI, but it's still much better than current RISC-V's. I'll try it on our hardware: 910. wait a moment :) -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel