From: Guo Ren <guoren@kernel.org>
To: Will Deacon <will@kernel.org>
Cc: julien.thierry@arm.com, Catalin Marinas <catalin.marinas@arm.com>,
Palmer Dabbelt <palmer@sifive.com>,
Will Deacon <will.deacon@arm.com>,
christoffer.dall@arm.com, Atish Patra <Atish.Patra@wdc.com>,
Julien Grall <julien.grall@arm.com>,
gary@garyguo.net, linux-riscv@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, Mike Rapoport <rppt@linux.ibm.com>,
Christoph Hellwig <hch@infradead.org>,
aou@eecs.berkeley.edu, Arnd Bergmann <arnd@arndb.de>,
suzuki.poulose@arm.com, Marc Zyngier <marc.zyngier@arm.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
linux-arm-kernel@lists.infradead.org,
Anup Patel <anup.Patel@wdc.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
iommu@lists.linux-foundation.org, james.morse@arm.com
Subject: Re: [PATCH RFC 11/14] arm64: Move the ASID allocator code in a separate file
Date: Thu, 12 Sep 2019 15:59:43 +0100 [thread overview]
Message-ID: <CAJF2gTT2c45HRfATF+=zs-HNToFAKgq1inKRmJMV3uPYBo4iVg@mail.gmail.com> (raw)
In-Reply-To: <20190912140256.fwbutgmadpjbjnab@willie-the-truck>
Thx Will for reply.
On Thu, Sep 12, 2019 at 3:03 PM Will Deacon <will@kernel.org> wrote:
>
> On Sun, Sep 08, 2019 at 07:52:55AM +0800, Guo Ren wrote:
> > On Mon, Jun 24, 2019 at 6:40 PM Will Deacon <will@kernel.org> wrote:
> > > > I'll keep my system use the same ASID for SMP + IOMMU :P
> > >
> > > You will want a separate allocator for that:
> > >
> > > https://lkml.kernel.org/r/20190610184714.6786-2-jean-philippe.brucker@arm.com
> >
> > Yes, it is hard to maintain ASID between IOMMU and CPUMMU or different
> > system, because it's difficult to synchronize the IO_ASID when the CPU
> > ASID is rollover.
> > But we could still use hardware broadcast TLB invalidation instruction
> > to uniformly manage the ASID and IO_ASID, or OTHER_ASID in our IOMMU.
>
> That's probably a bad idea, because you'll likely stall execution on the
> CPU until the IOTLB has completed invalidation. In the case of ATS, I think
> an endpoint ATC is permitted to take over a minute to respond. In reality, I
> suspect the worst you'll ever see would be in the msec range, but that's
> still an unacceptable period of time to hold a CPU.
Just as I've said in the session that IOTLB invalidate delay is
another topic, My main proposal is to introduce stage1.pgd and
stage2.pgd as address space identifiers between different TLB systems
based on vmid, asid. My last part of sildes will show you how to
translate stage1/2.pgd to as/vmid in PCI ATS system and the method
could work with SMMU-v3 and intel Vt-d. (It's regret for me there is
no time to show you the whole slides.)
In our light IOMMU implementation, there's no IOTLB invalidate delay
problem. Becasue IOMMU is very close to CPU MMU and interconnect's
delay is the same with SMP CPUs MMU (no PCI, VM supported).
To solve the problem, we could define a async mode in sfence.vma.b to
slove the problem and finished with per_cpu_irq/exception.
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
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next prev parent reply other threads:[~2019-09-12 15:00 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-21 16:36 [PATCH RFC 00/14] kvm/arm: Align the VMID allocation with the arm64 ASID one Julien Grall
2019-03-21 16:36 ` [PATCH RFC 01/14] arm64/mm: Introduce asid_info structure and move asid_generation/asid_map to it Julien Grall
2019-03-21 17:03 ` Suzuki K Poulose
2019-03-21 17:27 ` Julien Grall
2019-03-21 16:36 ` [PATCH RFC 02/14] arm64/mm: Move active_asids and reserved_asids to asid_info Julien Grall
2019-03-21 16:36 ` [PATCH RFC 03/14] arm64/mm: Move bits " Julien Grall
2019-03-21 16:36 ` [PATCH RFC 04/14] arm64/mm: Move the variable lock and tlb_flush_pending " Julien Grall
2019-03-21 16:36 ` [PATCH RFC 05/14] arm64/mm: Remove dependency on MM in new_context Julien Grall
2019-03-21 16:36 ` [PATCH RFC 06/14] arm64/mm: Store the number of asid allocated per context Julien Grall
2019-03-21 16:36 ` [PATCH RFC 07/14] arm64/mm: Introduce NUM_ASIDS Julien Grall
2019-03-21 16:36 ` [PATCH RFC 08/14] arm64/mm: Split asid_inits in 2 parts Julien Grall
2019-03-21 16:36 ` [PATCH RFC 09/14] arm64/mm: Split the function check_and_switch_context in 3 parts Julien Grall
2019-03-21 16:36 ` [PATCH RFC 10/14] arm64/mm: Introduce a callback to flush the local context Julien Grall
2019-03-21 16:36 ` [PATCH RFC 11/14] arm64: Move the ASID allocator code in a separate file Julien Grall
2019-06-05 16:56 ` Julien Grall
2019-06-05 20:41 ` Palmer Dabbelt
2019-06-11 1:56 ` Gary Guo
2019-06-19 8:07 ` Guo Ren
2019-06-19 8:54 ` Julien Grall
2019-06-19 9:12 ` Will Deacon
2019-06-19 12:18 ` Guo Ren
2019-06-19 12:39 ` Will Deacon
2019-06-20 9:33 ` Guo Ren
2019-06-24 10:40 ` Will Deacon
2019-06-25 7:25 ` Palmer Dabbelt
2019-09-07 23:52 ` Guo Ren
2019-09-12 14:02 ` Will Deacon
2019-09-12 14:59 ` Guo Ren [this message]
[not found] ` <CAJF2gTTsHCsSpf1ncVb=ZJS2d=r+AdDi2=5z-REVS=uUg9138A@mail.gmail.com>
2019-09-14 8:49 ` Guo Ren
2019-09-16 12:57 ` Jean-Philippe Brucker
2019-09-19 13:07 ` Guo Ren
2019-09-19 15:18 ` Jean-Philippe Brucker
2019-09-20 0:07 ` Guo Ren
2019-09-20 7:18 ` Jean-Philippe Brucker
2019-09-14 14:01 ` Palmer Dabbelt
2019-09-15 5:03 ` Anup Patel
2019-09-16 18:18 ` Will Deacon
2019-09-16 18:28 ` Palmer Dabbelt
2019-09-17 3:42 ` Anup Patel
2019-09-19 13:36 ` Guo Ren
2019-06-19 11:51 ` Guo Ren
2019-06-19 12:52 ` Julien Grall
2019-06-21 14:16 ` Catalin Marinas
2019-06-23 16:35 ` Guo Ren
2019-06-24 10:22 ` Will Deacon
2019-06-27 9:41 ` qi.fuli
2019-06-27 10:26 ` Will Deacon
2019-06-24 15:38 ` Catalin Marinas
2019-06-30 4:29 ` Guo Ren
2019-07-01 9:17 ` Catalin Marinas
2019-07-16 3:31 ` Guo Ren
2019-07-22 16:38 ` Catalin Marinas
2019-03-21 16:36 ` [PATCH RFC 12/14] arm64/lib: asid: Allow user to update the context under the lock Julien Grall
2019-03-21 16:36 ` [PATCH RFC 13/14] arm/kvm: Introduce a new VMID allocator Julien Grall
2019-03-21 16:36 ` [PATCH RFC 14/14] kvm/arm: Align the VMID allocation with the arm64 ASID one Julien Grall
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