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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=U8p26XYqH5TPqHeQad7U65Znhq7tW+I3xCdiHZkPSpw=; b=ujuQCOAGKHLoI5KNR4HVWmmLpyhu836DxlsWOcPO7QttDyfC0+rskFeyx59KsuJCKD 69Fjrv+pTJgdHc0FthL2wQdLWzlQE6JL4VGrYejz9NeEHAXlMcTUpEud/nNFlQYhUFT2 zo3zNFsDPbo+xRBK3lOPDrnYFdLH8GPZXukobCdURFPOPekG75fcPE0xSBs5IkydXhWD qkw+/Xvs3EnGew8qjY0utWPV+4dJ7VDUOL1P4fLOJADhUzMcZi79PlOcf5n/OhwFsi2j uJycG/G9n8k+jghGc8bue8G63APYGWwRPBfZfW9Sh632xiK3YMZ74Gh0/xKidpoWgdwg rxAw== X-Gm-Message-State: APjAAAVVs56UxD6Xup54u7eow4HMOlQRdaYnEll487WPYYMJHzUqoWsb 9/IyC0UAXnKxWz0Dbt40mw9nD3R+qLP/azfaGvM= X-Google-Smtp-Source: APXvYqytqNiv5noMGnzCkM3rhghUIUChzKwN8or6v9tCbNWgAONdjfZGD/sKd5quAzzGMSJy96OxTz6jDoGYY1aFd9Q= X-Received: by 2002:a9d:1b0d:: with SMTP id l13mr171271otl.84.1573118743606; Thu, 07 Nov 2019 01:25:43 -0800 (PST) MIME-Version: 1.0 References: <20191106140748.13100-1-gch981213@gmail.com> <20191106140748.13100-3-gch981213@gmail.com> <20191107010928.GA14186@bogus> In-Reply-To: <20191107010928.GA14186@bogus> From: Chuanhong Guo Date: Thu, 7 Nov 2019 17:25:32 +0800 Message-ID: Subject: Re: [PATCH 2/2] dt-bindings: mtd: mtk-quadspi: update bindings for mmap flash read To: Rob Herring X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191107_012544_710044_DF70A8B0 X-CRM114-Status: GOOD ( 16.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Vignesh Raghavendra , Tudor Ambarus , Richard Weinberger , open list , linux-mtd@lists.infradead.org, Miquel Raynal , Matthias Brugger , linux-mediatek@lists.infradead.org, Brian Norris , David Woodhouse , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi! On Thu, Nov 7, 2019 at 9:09 AM Rob Herring wrote: > > On Wed, Nov 06, 2019 at 10:07:48PM +0800, Chuanhong Guo wrote: > > update register descriptions and add an example binding using it. > > > > Signed-off-by: Chuanhong Guo > > --- > > .../devicetree/bindings/mtd/mtk-quadspi.txt | 21 ++++++++++++++++++- > > 1 file changed, 20 insertions(+), 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > index a12e3b5c495d..4860f6e96f5a 100644 > > --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > @@ -12,7 +12,10 @@ Required properties: > > "mediatek,mt7623-nor", "mediatek,mt8173-nor" > > "mediatek,mt7629-nor", "mediatek,mt8173-nor" > > "mediatek,mt8173-nor" > > -- reg: physical base address and length of the controller's register > > +- reg: Contains one or two entries, each of which is a tuple consisting of a > > + physical address and length. The first entry is the address and length > > + of the controller register set. The optional second entry is the address > > + and length of the area where the nor flash is mapped to. > > All the compatibles support 2 entries? If not, which ones? It should be. I implemented it as an optional feature only because I don't know the mapped address space for all these chips and can't update every device trees. Regards, Chuanhong Guo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel