From: Vincent Guittot <vincent.guittot@linaro.org>
To: Marc Zyngier <maz@kernel.org>
Cc: Sumit Garg <sumit.garg@linaro.org>,
Android Kernel Team <kernel-team@android.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Russell King <linux@arm.linux.org.uk>,
Jason Cooper <jason@lakedaemon.net>,
Saravana Kannan <saravanak@google.com>,
Andrew Lunn <andrew@lunn.ch>,
Catalin Marinas <catalin.marinas@arm.com>,
Gregory Clement <gregory.clement@bootlin.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Will Deacon <will@kernel.org>,
Valentin Schneider <Valentin.Schneider@arm.com>,
LAK <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 03/16] arm64: Allow IPIs to be handled as normal interrupts
Date: Tue, 27 Oct 2020 11:12:15 +0100 [thread overview]
Message-ID: <CAKfTPtBURraZh8E8p3PmncoDRVV5N42yTyJcpPf0OROciM2+xg@mail.gmail.com> (raw)
In-Reply-To: <CAKfTPtBjw5ay_BcPmEXpHOHbNxNZuYmdCoHQM53u3c+RXnKONg@mail.gmail.com>
HI Marc,
On Mon, 19 Oct 2020 at 17:43, Vincent Guittot
<vincent.guittot@linaro.org> wrote:
>
> On Mon, 19 Oct 2020 at 15:04, Marc Zyngier <maz@kernel.org> wrote:
> >
...
> > >>
> > >> One of the major difference is that we end up, in some cases
> > >> (such as when performing IRQ time accounting on the scheduler
> > >> IPI), end up with nested irq_enter()/irq_exit() pairs.
> > >> Other than the (relatively small) overhead, there should be
> > >> no consequences to it (these pairs are designed to nest
> > >> correctly, and the accounting shouldn't be off).
> > >
> > > While rebasing on mainline, I have faced a performance regression for
> > > the benchmark:
> > > perf bench sched pipe
> > > on my arm64 dual quad core (hikey) and my 2 nodes x 112 CPUS (thx2)
> > >
> > > The regression comes from:
> > > commit: d3afc7f12987 ("arm64: Allow IPIs to be handled as normal
> > > interrupts")
> >
> > That's interesting, as this patch doesn't really change anything (most
> > of the potential overhead comes in later). The only potential overhead
> > I can see is that the scheduler_ipi() call is now wrapped around
> > irq_enter()/irq_exit().
> >
> > >
> > > v5.9 + this patch
> > > hikey : 48818(+/- 0.31) 37503(+/- 0.15%) -23.2%
> > > thx2 : 132410(+/- 1.72) 122646(+/- 1.92%) -7.4%
> > >
> > > By + this patch, I mean merging branch from this patch. Whereas
> > > merging the previous:
> > > commit: 83cfac95c018 ("genirq: Allow interrupts to be excluded from
> > > /proc/interrupts")
> > > It doesn't show any regression
> >
> > Since you are running perf, can you spot where the overhead occurs?
Any idea about the root cause of the regression ?
I have faced it on more arm64 platforms in the meantime
>
> hmm... Difficult to say because tracing the bench decreases a lot the
> result. I have pasted the perf reports.
>
> With this patch :
>
> # Samples: 634 of event 'cpu-clock'
> # Event count (approx.): 158500000
> #
> # Overhead Command Shared Object Symbol
> # ........ .......... .................. ..................................
> #
> 31.86% sched-pipe [kernel.kallsyms] [k] _raw_spin_unlock_irqrestore
> 8.68% sched-pipe [kernel.kallsyms] [k] _raw_spin_unlock_irq
> 6.31% sched-pipe [kernel.kallsyms] [k] __schedule
> 5.21% sched-pipe [kernel.kallsyms] [k] schedule
> 4.73% sched-pipe [kernel.kallsyms] [k] pipe_read
> 3.31% sched-pipe [kernel.kallsyms] [k] el0_svc_common.constprop.3
> 2.84% sched-pipe [kernel.kallsyms] [k] ww_mutex_lock_interruptible
> 2.52% sched-pipe [kernel.kallsyms] [k] init_wait_entry
> 2.37% sched-pipe [kernel.kallsyms] [k] mutex_unlock
> 2.21% sched-pipe [kernel.kallsyms] [k] new_sync_read
> 1.89% sched-pipe [kernel.kallsyms] [k] new_sync_write
> 1.74% sched-pipe [kernel.kallsyms] [k] security_file_permission
> 1.74% sched-pipe [kernel.kallsyms] [k] vfs_read
> 1.58% sched-pipe [kernel.kallsyms] [k] __my_cpu_offset
> 1.26% sched-pipe libpthread-2.24.so [.] 0x0000000000010a2c
> 1.10% sched-pipe [kernel.kallsyms] [k] mutex_lock
> 1.10% sched-pipe [kernel.kallsyms] [k] vfs_write
>
> After reverting this patch which gives a result similar to v5.9:
>
> # Samples: 659 of event 'cpu-clock'
> # Event count (approx.): 164750000
> #
> # Overhead Command Shared Object Symbol
> # ........ .......... .................. ...............................
> #
> 29.29% sched-pipe [kernel.kallsyms] [k] _raw_spin_unlock_irqrestore
> 21.40% sched-pipe [kernel.kallsyms] [k] _raw_spin_unlock_irq
> 4.86% sched-pipe [kernel.kallsyms] [k] pipe_read
> 4.55% sched-pipe [kernel.kallsyms] [k] ww_mutex_lock_interruptible
> 2.88% sched-pipe [kernel.kallsyms] [k] __schedule
> 2.88% sched-pipe [kernel.kallsyms] [k] _raw_spin_lock_irqsave
> 2.88% sched-pipe [kernel.kallsyms] [k] schedule
> 2.12% sched-pipe [kernel.kallsyms] [k] new_sync_read
> 1.82% sched-pipe [kernel.kallsyms] [k] mutex_lock
> 1.67% sched-pipe [kernel.kallsyms] [k] el0_svc_common.constprop.3
> 1.67% sched-pipe [kernel.kallsyms] [k] pipe_write
> 1.21% sched-pipe [kernel.kallsyms] [k] rw_verify_area
> 1.21% sched-pipe [kernel.kallsyms] [k] security_file_permission
> 1.06% sched-pipe [kernel.kallsyms] [k] fsnotify
>
> I have only put symbol with overhead above 1%
>
> so _raw_spin_unlock_irq, schedule and __schedule seem the most
> impacted but i can't get any conclusion
>
> I can sent you perf.data files if you want
>
>
> >
> > Thanks,
> >
> > M.
> > --
> > Jazz is not dead. It just smells funny...
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-10-27 10:13 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-01 14:43 [PATCH v3 00/16] arm/arm64: Turning IPIs into normal interrupts Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 01/16] genirq: Add fasteoi IPI flow Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 02/16] genirq: Allow interrupts to be excluded from /proc/interrupts Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 03/16] arm64: Allow IPIs to be handled as normal interrupts Marc Zyngier
2020-09-11 15:05 ` Catalin Marinas
2020-10-19 12:42 ` Vincent Guittot
2020-10-19 13:04 ` Marc Zyngier
2020-10-19 15:43 ` Vincent Guittot
2020-10-19 16:00 ` Valentin Schneider
2020-10-27 10:12 ` Vincent Guittot [this message]
2020-10-27 10:37 ` Marc Zyngier
2020-10-27 10:50 ` Vincent Guittot
2020-10-27 11:21 ` Vincent Guittot
2020-10-27 12:06 ` Marc Zyngier
2020-10-27 13:17 ` Vincent Guittot
[not found] ` <c66367b0-e8a0-2b7b-13c3-c9413462357c@huawei.com>
2021-05-06 11:44 ` Marc Zyngier
2021-05-07 7:30 ` He Ying
2021-05-07 8:56 ` Marc Zyngier
2021-05-07 9:31 ` He Ying
2020-09-01 14:43 ` [PATCH v3 04/16] ARM: " Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 05/16] irqchip/gic-v3: Describe the SGI range Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 06/16] irqchip/gic-v3: Configure SGIs as standard interrupts Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 07/16] irqchip/gic: Refactor SMP configuration Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 08/16] irqchip/gic: Configure SGIs as standard interrupts Marc Zyngier
[not found] ` <CGME20200914130601eucas1p23ce276d168dee37909b22c75499e68da@eucas1p2.samsung.com>
2020-09-14 13:06 ` Marek Szyprowski
2020-09-14 13:13 ` Marc Zyngier
2020-09-14 13:26 ` Marek Szyprowski
2020-09-14 15:09 ` Marc Zyngier
2020-09-15 6:48 ` Marek Szyprowski
2020-09-15 8:07 ` Marc Zyngier
2020-09-15 8:35 ` Marek Szyprowski
2020-09-15 9:48 ` Marc Zyngier
2020-09-16 14:16 ` Jon Hunter
2020-09-16 15:10 ` Marc Zyngier
2020-09-16 15:46 ` Jon Hunter
2020-09-16 15:55 ` Marc Zyngier
2020-09-16 15:58 ` Jon Hunter
2020-09-16 16:22 ` Marc Zyngier
2020-09-16 16:28 ` Marc Zyngier
2020-09-16 19:08 ` Jon Hunter
2020-09-16 19:06 ` Jon Hunter
2020-09-16 19:26 ` Mikko Perttunen
2020-09-16 19:39 ` Jon Hunter
2020-09-17 7:40 ` Linus Walleij
2020-09-17 7:50 ` Marc Zyngier
2020-09-17 7:54 ` Jon Hunter
2020-09-17 8:45 ` Marc Zyngier
2020-09-17 8:49 ` Jon Hunter
2020-09-17 8:54 ` Marek Szyprowski
2020-09-17 9:09 ` Jon Hunter
2020-09-17 9:13 ` Marek Szyprowski
2020-09-17 9:29 ` Marc Zyngier
2020-09-17 14:53 ` Jon Hunter
2020-09-17 18:24 ` Jon Hunter
2020-09-18 8:24 ` Marc Zyngier
2020-09-17 8:56 ` Marc Zyngier
2020-09-17 10:11 ` Linus Walleij
2020-09-16 14:03 ` Linus Walleij
2020-09-16 14:14 ` Marc Zyngier
2020-09-18 9:58 ` James Morse
2020-09-18 10:21 ` Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 09/16] irqchip/gic-common: Don't enable SGIs by default Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 10/16] irqchip/bcm2836: Configure mailbox interrupts as standard interrupts Marc Zyngier
[not found] ` <CGME20200914143236eucas1p17e8849c67d01db2c5ebb3b6a126aebf4@eucas1p1.samsung.com>
2020-09-14 14:32 ` Marek Szyprowski
2020-09-14 16:10 ` Marc Zyngier
2020-09-14 19:13 ` Marek Szyprowski
2020-09-01 14:43 ` [PATCH v3 11/16] irqchip/hip04: Configure IPIs " Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 12/16] irqchip/armada-370-xp: " Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 13/16] arm64: Kill __smp_cross_call and co Marc Zyngier
2020-09-11 15:06 ` Catalin Marinas
2020-09-01 14:43 ` [PATCH v3 14/16] arm64: Remove custom IRQ stat accounting Marc Zyngier
2020-09-11 15:06 ` Catalin Marinas
2020-09-01 14:43 ` [PATCH v3 15/16] ARM: Kill __smp_cross_call and co Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 16/16] ARM: Remove custom IRQ stat accounting Marc Zyngier
2020-09-02 7:41 ` kernel test robot
2020-09-02 20:20 ` Marc Zyngier
2020-09-24 9:00 ` Guillaume Tucker
2020-09-24 9:29 ` Marc Zyngier
2020-09-24 13:09 ` Guillaume Tucker
2020-09-28 9:00 ` Guillaume Tucker
2020-09-24 13:34 ` Fabio Estevam
2020-09-24 14:19 ` Guillaume Tucker
2020-09-07 6:06 ` [PATCH v3 00/16] arm/arm64: Turning IPIs into normal interrupts hasegawa-hitomi
2020-09-16 16:54 ` Florian Fainelli
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAKfTPtBURraZh8E8p3PmncoDRVV5N42yTyJcpPf0OROciM2+xg@mail.gmail.com \
--to=vincent.guittot@linaro.org \
--cc=Valentin.Schneider@arm.com \
--cc=andrew@lunn.ch \
--cc=catalin.marinas@arm.com \
--cc=f.fainelli@gmail.com \
--cc=gregory.clement@bootlin.com \
--cc=jason@lakedaemon.net \
--cc=kernel-team@android.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@arm.linux.org.uk \
--cc=maz@kernel.org \
--cc=saravanak@google.com \
--cc=sumit.garg@linaro.org \
--cc=tglx@linutronix.de \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).