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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Mark Brown <broonie@kernel.org>,
	Richard Henderson <richard.henderson@linaro.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v10 1/3] arm64: Implement archrandom.h for ARMv8.5-RNG
Date: Wed, 15 Jan 2020 08:40:46 +0100	[thread overview]
Message-ID: <CAKv+Gu9pVZZm_gvsKfrCG_cM=1TmAAH+sj06GzT+Ag9Ej7__fg@mail.gmail.com> (raw)
In-Reply-To: <20200114174432.GG2579@willie-the-truck>

On Tue, 14 Jan 2020 at 18:44, Will Deacon <will@kernel.org> wrote:
>
> On Fri, Jan 10, 2020 at 12:23:39PM +0000, Mark Brown wrote:
> > From: Richard Henderson <richard.henderson@linaro.org>
> >
> > Expose the ID_AA64ISAR0.RNDR field to userspace, as the RNG system
> > registers are always available at EL0.
> >
> > Implement arch_get_random_seed_long using RNDR.  Given that the
> > TRNG is likely to be a shared resource between cores, and VMs,
> > do not explicitly force re-seeding with RNDRRS.  In order to avoid
> > code complexity and potential issues with hetrogenous systems only
> > provide values after cpufeature has finalized the system capabilities.
> >
> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> > [Modified to only function after cpufeature has finalized the system
> > capabilities and move all the code into the header -- broonie]
> > Signed-off-by: Mark Brown <broonie@kernel.org>
> > Reviewed-by: Mark Rutland <mark.rutland@arm.com>
> > ---
> >  Documentation/arm64/cpu-feature-registers.rst |  2 +
> >  arch/arm64/Kconfig                            | 12 ++++
> >  arch/arm64/include/asm/archrandom.h           | 67 +++++++++++++++++++
> >  arch/arm64/include/asm/cpucaps.h              |  3 +-
> >  arch/arm64/include/asm/sysreg.h               |  4 ++
> >  arch/arm64/kernel/cpufeature.c                | 13 ++++
> >  6 files changed, 100 insertions(+), 1 deletion(-)
> >  create mode 100644 arch/arm64/include/asm/archrandom.h
>
> In which case, should we also add an HWCAP for this?
>

Isn't this covered by the 'cpuid' HWCAP? We can't prevent EL0 from
accessing these system registers anyway, even if we wanted to.

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  reply	other threads:[~2020-01-15  7:41 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-10 12:23 [PATCH v10 0/3] ARMv8.5-RNG support Mark Brown
2020-01-10 12:23 ` [PATCH v10 1/3] arm64: Implement archrandom.h for ARMv8.5-RNG Mark Brown
2020-01-14 17:44   ` Will Deacon
2020-01-15  7:40     ` Ard Biesheuvel [this message]
2020-01-15  9:16       ` Will Deacon
2020-01-15  9:24         ` Ard Biesheuvel
2020-01-15 11:07           ` Mark Brown
2020-01-15 11:16             ` Will Deacon
2020-01-15 14:26             ` Catalin Marinas
2020-01-16  0:23               ` Richard Henderson
2020-01-16 11:02                 ` Catalin Marinas
2020-01-16 11:10                   ` Ard Biesheuvel
2020-01-16 11:40                     ` Catalin Marinas
2020-01-10 12:23 ` [PATCH v10 2/3] arm64: random: Add data to pool from setup_arch() Mark Brown
2020-01-10 12:35   ` Mark Rutland
2020-01-13 19:09   ` Richard Henderson
2020-01-15  7:48   ` Ard Biesheuvel
2020-01-15  9:16     ` Will Deacon
2020-01-15  9:22       ` Ard Biesheuvel
2020-01-15 10:11         ` Mark Rutland
2020-01-15 14:01           ` Mark Brown
2020-01-15 12:07       ` Mark Brown
2020-01-15 12:42         ` Will Deacon
2020-01-15 13:36           ` Ard Biesheuvel
2020-01-15 17:04             ` Mark Brown
2020-01-16 11:33               ` Will Deacon
2020-01-15 15:40           ` Mark Brown
2020-01-10 12:23 ` [PATCH v10 3/3] arm64: Use v8.5-RNG entropy for KASLR seed Mark Brown
2020-01-10 12:35   ` Mark Rutland
2020-01-13 19:09   ` Richard Henderson

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