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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=PSEnQlO4ryJ5lj1eUjpEnJNgdDcKb7s4xmHWDAD6wFA=; b=c7XGEbJyDiItnE9EksKUpMp92AGjDZQwnnZxRJYNpn2LfZRvqhlj1uIJnQ7OWQxAZi n7mu3ZDK9xL+rbHjv7yw/bMuOTv6NAajQ6Bwrat3kPPp6uh1ehdhCj49o2oAWzGVmtdT 1q8vExX/XCrxRaHVro1CaifnvsCUdmC9QTnC9+UuxALqo5g2hjJBztfF6QcRAFbOVlre Fb/whC8LaUQTxhc4Jv2OSu+Cnrr0OEVmDJpsQc9JOkpnWxzpHY6q1criDSXk4zckmG2A 0WwMdb6VGl4kWCF7/IEMsW2VS/utr7ZelqQij7pc/7m3ixNxgZ/DpVKzn8BSzlNMZpD1 roYA== X-Gm-Message-State: APjAAAUHG+ih3wmNi+OB5VDpVJJEb6QBm97+loLK5vCzxlb98VUKrrkh dZXYesf3YiawTTInvwM44JjesC+lDbG21i8aCtTUag== X-Google-Smtp-Source: APXvYqxO9HQ9KWZQWEqmdGEwKaw5+KXyYiq9o9hgt1i/4kSVEQkCmMwNZAPJ/7nG39ptRqsCkOpqcQLOfsuy1y978mo= X-Received: by 2002:a6b:7b02:: with SMTP id l2mr1605643iop.60.1551262583854; Wed, 27 Feb 2019 02:16:23 -0800 (PST) MIME-Version: 1.0 References: <20190224140426.3267-1-marc.zyngier@arm.com> <20190226232822.GA174696@google.com> In-Reply-To: From: Ard Biesheuvel Date: Wed, 27 Feb 2019 11:16:12 +0100 Message-ID: Subject: Re: [PATCH 0/4] mwifiex PCI/wake-up interrupt fixes To: Marc Zyngier X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190227_021625_592392_C3BF9034 X-CRM114-Status: GOOD ( 22.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ganapathi Bhat , Brian Norris , Heiko Stuebner , Devicetree List , Xinming Hu , "" , linux-pm , Jeffy Chen , "" , Linux Kernel Mailing List , Amitkumar Karwar , linux-rockchip@lists.infradead.org, Nishant Sarmukadam , Rob Herring , "Rafael J. Wysocki" , Kalle Valo , Enric Balletbo i Serra , Lorenzo Pieralisi , "David S. Miller" , linux-arm-kernel , Tony Lindgren Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 27 Feb 2019 at 11:02, Marc Zyngier wrote: > > + Lorenzo > > Hi Brian, > > On 26/02/2019 23:28, Brian Norris wrote: > > + others > > > > Hi Marc, > > > > Thanks for the series. I have a few bits of history to add to this, and > > some comments. > > > > On Sun, Feb 24, 2019 at 02:04:22PM +0000, Marc Zyngier wrote: > >> For quite some time, I wondered why the PCI mwifiex device built in my > >> Chromebook was unable to use the good old legacy interrupts. But as MSIs > >> were working fine, I never really bothered investigating. I finally had a > >> look, and the result isn't very pretty. > >> > >> On this machine (rk3399-based kevin), the wake-up interrupt is described as > >> such: > >> > >> &pci_rootport { > >> mvl_wifi: wifi@0,0 { > >> compatible = "pci1b4b,2b42"; > >> reg = <0x83010000 0x0 0x00000000 0x0 0x00100000 > >> 0x83010000 0x0 0x00100000 0x0 0x00100000>; > >> interrupt-parent = <&gpio0>; > >> interrupts = <8 IRQ_TYPE_LEVEL_LOW>; > >> pinctrl-names = "default"; > >> pinctrl-0 = <&wlan_host_wake_l>; > >> wakeup-source; > >> }; > >> }; > >> > >> Note how the interrupt is part of the properties directly attached to the > >> PCI node. And yet, this interrupt has nothing to do with a PCI legacy > >> interrupt, as it is attached to the wake-up widget that bypasses the PCIe RC > >> altogether (Yay for the broken design!). This is in total violation of the > >> IEEE Std 1275-1994 spec[1], which clearly documents that such interrupt > >> specifiers describe the PCI device interrupts, and must obey the > >> INT-{A,B,C,D} mapping. Oops! > > > > You're not the first person to notice this. All the motivations are not > > necessarily painted clearly in their cover letter, but here are some > > previous attempts at solving this problem: > > > > [RFC PATCH v11 0/5] PCI: rockchip: Move PCIe WAKE# handling into pci core > > https://lkml.kernel.org/lkml/20171225114742.18920-1-jeffy.chen@rock-chips.com/ > > http://lkml.kernel.org/lkml/20171226023646.17722-1-jeffy.chen@rock-chips.com/ > > > > As you can see by the 12th iteration, it wasn't left unsolved for lack > > of trying... > > I wasn't aware of this. That's definitely a better approach than my > hack, and I would really like this to be revived. > I don't think this approach is entirely sound either. >From the side of the PCI device, WAKE# is just a GPIO line, and how it is wired into the system is an entirely separate matter. So I don't think it is justified to overload the notion of legacy interrupts with some other pin that may behave in a way that is vaguely similar to how a true wake-up capable interrupt works. So I'd argue that we should add an optional 'wake-gpio' DT property instead to the generic PCI device binding, and leave the interrupt binding and discovery alone. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel