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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=yJSK7vyM21/4No0uZ8AwiACHLCifL2VdE7QHrfCrZXM=; b=FOWqRMQOkO0eUN9/iM0qLzImPhjO+8HG98Vuj2U2Jco9557wu7h7ag/Xcl/EQjS5Sa Q2IRBmaUJdxHHocaaBgEDt+4CDXPEPFJ058lQwnVx0hiaxuTWzMZ/bgpW792eJqGFRhS nVywnICW0mzC8a9+r1YjmQwMHfyPUyvnFBnKvI8dFNignkA70HF0hW18Rx0p8OYCdiMy XF2mOtY1pn84YIlt2ilFAawPdMblMXHjP49SaAK22XsSxnTr6VV7a1FsTYhcnO522FfP cdAK0vCHnpLxJ7zUGBjyL7XU2flzwzj7JJZyO8julkACX/EM1DwVBAbx8Jk4EdUaRlpI MaPw== X-Gm-Message-State: AHQUAuZg/mdXL7XP8CMh7fLsbUduTS2ElEOVLa+qdsMyTUUPthogmk6Z eWTuU9Do9axy63hhWQAEyLdlQ8hpeexp2qutdaoL8uJ0 X-Google-Smtp-Source: AHgI3IZFOhN5i1bzfjSAeGWF6FtGZOytc3yGit6dQRWfFZWgvsuqh8L6YBNcc3LpLVjag1sG6KiklTKrieRNRlfFft8= X-Received: by 2002:a5e:9704:: with SMTP id w4mr1373731ioj.60.1549955268086; Mon, 11 Feb 2019 23:07:48 -0800 (PST) MIME-Version: 1.0 References: <1546739729-17234-1-git-send-email-huanglingyan2@huawei.com> <9129b882-60f3-8046-0cb9-e0b2452a118d@huawei.com> <20190108135444.GB14476@fuggles.cambridge.arm.com> <20190116164657.GA1910@brain-police> <58c28adf-a01a-bb36-4def-866375e93aac@huawei.com> In-Reply-To: From: Ard Biesheuvel Date: Tue, 12 Feb 2019 08:07:35 +0100 Message-ID: Subject: Re: [PATCH v3] arm64: lib: accelerate do_csum with NEON instruction To: "huanglingyan (A)" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190211_230750_060225_FE287C28 X-CRM114-Status: GOOD ( 25.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Zhangshaokun , Catalin Marinas , Will Deacon , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Archived-At: List-Archive: On Tue, 12 Feb 2019 at 03:25, huanglingyan (A) wrote: > > > On 2019/1/18 19:14, Ard Biesheuvel wrote: > > On Fri, 18 Jan 2019 at 02:07, huanglingyan (A) wrote: > >> > >> On 2019/1/17 0:46, Will Deacon wrote: > >>> On Wed, Jan 09, 2019 at 10:03:05AM +0800, huanglingyan (A) wrote: > >>>> On 2019/1/8 21:54, Will Deacon wrote: > >>>>> [re-adding Ard and LAKML -- not sure why the headers are so munged] > >>>>> > >>>>> On Mon, Jan 07, 2019 at 10:38:55AM +0800, huanglingyan (A) wrote: > >>>>>> On 2019/1/6 16:26, Ard Biesheuvel wrote: > >>>>>> Please change this into > >>>>>> > >>>>>> if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && > >>>>>> len >= CSUM_NEON_THRESHOLD && > >>>>>> may_use_simd()) { > >>>>>> kernel_neon_begin(); > >>>>>> res = do_csum_neon(buff, len); > >>>>>> kernel_neon_end(); > >>>>>> } > >>>>>> > >>>>>> and drop the intermediate do_csum_arm() > >>>>>> > >>>>>> > >>>>>> + return do_csum_arm(buff, len); > >>>>>> +#endif /* CONFIG_KERNEL_MODE_NEON */ > >>>>>> > >>>>>> No else? What happens if len < CSUM_NEON_THRESHOLD ? > >>>>>> > >>>>>> > >>>>>> +#undef do_csum > >>>>>> > >>>>>> Can we drop this? > >>>>>> > >>>>>> Using NEON instructions will bring some costs. The spending maybe introduced > >>>>>> when reservering/restoring > >>>>>> neon registers with kernel_neon_begin()/kernel_neon_end(). Therefore NEON code > >>>>>> is Only used when > >>>>>> the length exceeds CSUM_NEON_THRESHOLD. General do csum() codes in lib/ > >>>>>> checksum.c will be used in > >>>>>> shorter length. To achieve this goal, I use the "#undef do_csum" in else clause > >>>>>> to have the oppotunity to > >>>>>> utilize the general codes. > >>>>> I don't think that's how it works :/ > >>>>> > >>>>> Before we get deeper into the implementation, please could you justify the > >>>>> need for a CPU-optimised checksum implementation at all? I thought this was > >>>>> usually offloaded to the NIC? > >>>>> > >>>>> Will > >>>>> > >>>>> . > >>>> This problem is introduced when testing Intel x710 network card on my ARM server. > >>>> Ip forward is set for ease of testing. Then send lots of packages to server by Tesgine > >>>> machine and then receive. > >>> In the marketing blurb, that card boasts: > >>> > >>> `Tx/Rx IP, SCTP, TCP, and UDP checksum offloading (IPv4, IPv6) capabilities' > >>> > >>> so we shouldn't need to run this on the CPU. Again, I'm not keen to optimise > >>> this given that it /really/ shouldn't be used on arm64 machines that care > >>> about network performance. > >>> > >>> Will > >>> > >>> . > >> Yeah, you are right. Checksum is usually done in network card which is told by > >> someone familiar with NIC. However, it may be used in testing scenaries and > >> some primary network cards. I think it's no harm to optimize this code while > >> other ARCHs have their own optimized versions. > > I disagree. If this code path is never exercised, we should not > > include it. We can revisit this decision when there is a use case > > where the checksumming performance is an actual bottleneck. > > > > . > The mainstream network cards has an option to switch the csum pattern. > Users can determine the one who calculate csum, hardware or software. > > ethtool -K eth0 rx-checksum off > ethtool -K eth0 tx-checksum-ip-generic off > > What's more, there's some network features that may cause hardware > checksum not work, like gso ( not so sure). Which means, the software > checksum has its existing meaning. > This does not make any sense to me. Segmentation offload relies on the hardware generating the actual packets, and I don't see how it would be able to do that if it cannot generate the checksum as well. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel