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* [PATCH v3 0/4] arm: imx: Add i.mx6q DaSheng COM-9XX SBC board support
@ 2021-04-15  4:05 dillon.minfei
  2021-04-15  4:05 ` [PATCH v3 1/4] dt-bindings: add dasheng vendor prefix dillon.minfei
                   ` (3 more replies)
  0 siblings, 4 replies; 14+ messages in thread
From: dillon.minfei @ 2021-04-15  4:05 UTC (permalink / raw)
  To: krzysztof.kozlowski, robh+dt, shawnguo, krzk, linux,
	s.riedmueller, matthias.schiffer, leoyang.li, arnd, olof,
	s.hauer, kernel, festevam, prabhakar.csengg, mchehab
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-imx,
	linux-media, dillon min

From: dillon min <dillon.minfei@gmail.com>

This patchset aims to add kernel support on DaSheng COM-8XX SBC board
optimize ov2659 driver to handle xvclk on/off at proper stage to save power

changes based on master branch, since commit id:
89698becf06d341a700913c3d89ce2a914af69a2

The DaSheng Com-9xx is and ARM based signle board computer (SBC)
featuring:
- i.MX6Q
- 2GiB LPDDR3 DRAM
- 8GiB eMMC 5.0 FLASH
- 4MiB SPI Flash
- USB 2.0 Host/Device
- Multiple multi-protocol RS232/RS485 Serial ports
- microSD socket
- 5V DC power input
- HDMI1.4a,1080p@60
- RGMIIx1 Gigabit Ethernet
- CSI0x1, connect with ov2659

---
v3:
- optimize commit message for patch v3 ov2659 part
- move 'imx6q-ds.dtb' after 'imx6q-dms-ba16.dtb' to follow the alphabetical order
  (arch/arm/boot/dts/Makefile)
- move 'ds,imx6q-sbc' after 'dmo,imx6q-edmqmx6' to follow the alphabetical
  order. (Documentation/devicetree/bindings/arm/fsl.yaml)
- move v2 patch 4 to v3 patch 1
- add 'Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>'
  for [PATCH v3 1/4]

- v2 link:
https://lore.kernel.org/linux-arm-kernel/1618383117-17179-1-git-send-email-dillon.minfei@gmail.com/T/#md2dc86ac665ed7f10cffe4909825b97608805d3f

v2:
- add "[PATCH v2 4/4] dt-bindings: add dasheng vendor prefix" to fix
  checkpatch.pl warning.


dillon min (4):
  dt-bindings: add dasheng vendor prefix
  dt-bindings: arm: imx: Add i.mx6q DaSheng COM-9XX SBC
  arm: dts: imx: Add i.mx6q DaSheng COM-9XX SBC board support
  media: i2c: ov2659: Use clk_{prepare_enable,disable_unprepare}() to
    set xvclk on/off

 Documentation/devicetree/bindings/arm/fsl.yaml     |   1 +
 .../devicetree/bindings/vendor-prefixes.yaml       |   2 +
 arch/arm/boot/dts/Makefile                         |   1 +
 arch/arm/boot/dts/imx6q-ds.dts                     |  17 +
 arch/arm/boot/dts/imx6qdl-ds.dtsi                  | 465 +++++++++++++++++++++
 drivers/media/i2c/ov2659.c                         |  24 +-
 6 files changed, 504 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6q-ds.dts
 create mode 100644 arch/arm/boot/dts/imx6qdl-ds.dtsi

-- 
2.7.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 1/4] dt-bindings: add dasheng vendor prefix
  2021-04-15  4:05 [PATCH v3 0/4] arm: imx: Add i.mx6q DaSheng COM-9XX SBC board support dillon.minfei
@ 2021-04-15  4:05 ` dillon.minfei
  2021-04-15 20:37   ` Rob Herring
  2021-04-15  4:05 ` [PATCH v3 2/4] dt-bindings: arm: imx: Add i.mx6q DaSheng COM-9XX SBC dillon.minfei
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 14+ messages in thread
From: dillon.minfei @ 2021-04-15  4:05 UTC (permalink / raw)
  To: krzysztof.kozlowski, robh+dt, shawnguo, krzk, linux,
	s.riedmueller, matthias.schiffer, leoyang.li, arnd, olof,
	s.hauer, kernel, festevam, prabhakar.csengg, mchehab
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-imx,
	linux-media, dillon min

From: dillon min <dillon.minfei@gmail.com>

Add vendor prefix for DaSheng, Inc.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
v3:
- move v2 patch 4 to v3 patch 1
- add 'Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>'

 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index f6064d84a424..4ec28488c963 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -309,6 +309,8 @@ patternProperties:
     description: DPTechnics
   "^dragino,.*":
     description: Dragino Technology Co., Limited
+  "^ds,.*":
+    description: DaSheng, Inc.
   "^dserve,.*":
     description: dServe Technology B.V.
   "^dynaimage,.*":
-- 
2.7.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 2/4] dt-bindings: arm: imx: Add i.mx6q DaSheng COM-9XX SBC
  2021-04-15  4:05 [PATCH v3 0/4] arm: imx: Add i.mx6q DaSheng COM-9XX SBC board support dillon.minfei
  2021-04-15  4:05 ` [PATCH v3 1/4] dt-bindings: add dasheng vendor prefix dillon.minfei
@ 2021-04-15  4:05 ` dillon.minfei
  2021-04-15  6:29   ` Krzysztof Kozlowski
  2021-04-15 20:37   ` Rob Herring
  2021-04-15  4:05 ` [PATCH v3 3/4] arm: dts: imx: Add i.mx6q DaSheng COM-9XX SBC board support dillon.minfei
  2021-04-15  4:05 ` [PATCH v3 4/4] media: i2c: ov2659: Use clk_{prepare_enable, disable_unprepare}() to set xvclk on/off dillon.minfei
  3 siblings, 2 replies; 14+ messages in thread
From: dillon.minfei @ 2021-04-15  4:05 UTC (permalink / raw)
  To: krzysztof.kozlowski, robh+dt, shawnguo, krzk, linux,
	s.riedmueller, matthias.schiffer, leoyang.li, arnd, olof,
	s.hauer, kernel, festevam, prabhakar.csengg, mchehab
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-imx,
	linux-media, dillon min

From: dillon min <dillon.minfei@gmail.com>

The DaSheng Com-9xx is and ARM based signle board computer (SBC)
featuring:
- i.MX6Q
- 2GiB LPDDR3 DRAM
- 8GiB eMMC 5.0 FLASH
- 4MiB SPI Flash
- USB 2.0 Host/Device
- Multiple multi-protocol RS232/RS485 Serial ports
- microSD socket
- 5V DC power input
- HDMI1.4a,1080p@60
- RGMIIx1 Gigabit Ethernet
- CSI0x1, connect with ov2659

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
v3: move 'ds,imx6q-sbc' after 'dmo,imx6q-edmqmx6' to follow the alphabetical
order.

 Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 297c87f45db8..598fb44c1bb8 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -197,6 +197,7 @@ properties:
               - boundary,imx6q-nitrogen6x
               - compulab,cm-fx6           # CompuLab CM-FX6
               - dmo,imx6q-edmqmx6         # Data Modul eDM-QMX6 Board
+              - ds,imx6q-sbc              # Da Sheng COM-9XX Modules
               - embest,imx6q-marsboard    # Embest MarS Board i.MX6Dual
               - emtrion,emcon-mx6         # emCON-MX6D or emCON-MX6Q SoM
               - emtrion,emcon-mx6-avari   # emCON-MX6D or emCON-MX6Q SoM on Avari Base
-- 
2.7.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 3/4] arm: dts: imx: Add i.mx6q DaSheng COM-9XX SBC board support
  2021-04-15  4:05 [PATCH v3 0/4] arm: imx: Add i.mx6q DaSheng COM-9XX SBC board support dillon.minfei
  2021-04-15  4:05 ` [PATCH v3 1/4] dt-bindings: add dasheng vendor prefix dillon.minfei
  2021-04-15  4:05 ` [PATCH v3 2/4] dt-bindings: arm: imx: Add i.mx6q DaSheng COM-9XX SBC dillon.minfei
@ 2021-04-15  4:05 ` dillon.minfei
  2021-04-20  6:43   ` dillon min
  2021-04-20 14:27   ` Fabio Estevam
  2021-04-15  4:05 ` [PATCH v3 4/4] media: i2c: ov2659: Use clk_{prepare_enable, disable_unprepare}() to set xvclk on/off dillon.minfei
  3 siblings, 2 replies; 14+ messages in thread
From: dillon.minfei @ 2021-04-15  4:05 UTC (permalink / raw)
  To: krzysztof.kozlowski, robh+dt, shawnguo, krzk, linux,
	s.riedmueller, matthias.schiffer, leoyang.li, arnd, olof,
	s.hauer, kernel, festevam, prabhakar.csengg, mchehab
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-imx,
	linux-media, dillon min

From: dillon min <dillon.minfei@gmail.com>

The DaSheng Com-9xx is and ARM based signle board computer (SBC)
featuring:
- i.MX6Q
- 2GiB LPDDR3 DRAM
- 8GiB eMMC 5.0 FLASH
- 4MiB SPI Flash
- USB 2.0 Host/Device
- Multiple multi-protocol RS232/RS485 Serial ports
- microSD socket
- 5V DC power input
- HDMI1.4a,1080p@60
- RGMIIx1 Gigabit Ethernet
- CSI0x1, connect with ov2659

Signed-off-by: dillon min <dillon.minfei@gmail.com>
---
v3: move imx6q-ds.dtb after imx6q-dms-ba16.dtb to follow the alphabetical order

 arch/arm/boot/dts/Makefile        |   1 +
 arch/arm/boot/dts/imx6q-ds.dts    |  17 ++
 arch/arm/boot/dts/imx6qdl-ds.dtsi | 465 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 483 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx6q-ds.dts
 create mode 100644 arch/arm/boot/dts/imx6qdl-ds.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a19c5ab9df84..425fe17ef7c1 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -510,6 +510,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
 	imx6q-display5-tianma-tm070-1280x768.dtb \
 	imx6q-dmo-edmqmx6.dtb \
 	imx6q-dms-ba16.dtb \
+	imx6q-ds.dtb \
 	imx6q-emcon-avari.dtb \
 	imx6q-evi.dtb \
 	imx6q-gk802.dtb \
diff --git a/arch/arm/boot/dts/imx6q-ds.dts b/arch/arm/boot/dts/imx6q-ds.dts
new file mode 100644
index 000000000000..b0a63a133977
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-ds.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright 2021 Dillon Min <dillon.minfei@gmail.com>
+//
+// Based on imx6qdl-sabresd.dtsi which is:
+// Copyright 2012 Freescale Semiconductor, Inc.
+// Copyright 2011 Linaro Ltd.
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-ds.dtsi"
+
+/ {
+	model = "DaSheng i.MX6 Quad Com-9xx Board";
+	compatible = "ds,imx6q-sbc", "fsl,imx6q";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-ds.dtsi b/arch/arm/boot/dts/imx6qdl-ds.dtsi
new file mode 100644
index 000000000000..d28e065349cd
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-ds.dtsi
@@ -0,0 +1,465 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Copyright 2021 Dillon Min <dillon.minfei@gmail.com>
+//
+// Based on imx6qdl-sabresd.dtsi which is:
+// Copyright 2012 Freescale Semiconductor, Inc.
+// Copyright 2011 Linaro Ltd.
+
+#include <dt-bindings/clock/imx6qdl-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	chosen {
+		stdout-path = &uart1;
+	};
+
+	memory@10000000 {
+		device_type = "memory";
+		reg = <0x10000000 0x80000000>;
+	};
+
+	reg_usb_otg_vbus: regulator-usb-otg-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_otg_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	reg_usb_h1_vbus: regulator-usb-h1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_h1_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_gpio_leds>;
+
+		green {
+			gpios = <&gpio4 8 0>;
+			default-state = "on";
+			linux,default-trigger = "heartbeat";
+		};
+	};
+};
+
+&ipu1_csi0_from_ipu1_csi0_mux {
+	bus-width = <8>;
+	data-shift = <12>; /* Lines 19:12 used */
+	hsync-active = <1>;
+	vsync-active = <1>;
+};
+
+&ipu1_csi0_mux_from_parallel_sensor {
+	remote-endpoint = <&ov2659_to_ipu1_csi0_mux>;
+};
+
+&ipu1_csi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ipu1_csi0>;
+	status = "okay";
+};
+
+&clks {
+	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
+			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
+	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
+				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
+};
+
+&ecspi1 {
+	cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi1>;
+	status = "okay";
+
+	flash: m25p80@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "st,m25p80", "jedec,spi-nor";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
+	};
+};
+
+&fec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet>;
+	phy-mode = "rgmii-id";
+	phy-handle = <&phy>;
+	fsl,magic-packet;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy: ethernet-phy@1 {
+			reg = <1>;
+			qca,clk-out-frequency = <125000000>;
+			reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
+			reset-assert-us = <10000>;
+		};
+	};
+};
+
+&hdmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi_cec>;
+	ddc-i2c-bus = <&i2c3>;
+	status = "okay";
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	status = "okay";
+
+	pmic: pfuze100@8 {
+		compatible = "fsl,pfuze100";
+		reg = <0x08>;
+
+		regulators {
+			sw1a_reg: sw1ab {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw1c_reg: sw1c {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw2_reg: sw2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw3a_reg: sw3a {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw3b_reg: sw3b {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw4_reg: sw4 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			swbst_reg: swbst {
+				regulator-min-microvolt = <5000000>;
+				regulator-max-microvolt = <5150000>;
+			};
+
+			snvs_reg: vsnvs {
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vref_reg: vrefddr {
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen1_reg: vgen1 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+			};
+
+			vgen2_reg: vgen2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+			};
+
+			vgen3_reg: vgen3 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vgen4_reg: vgen4 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen5_reg: vgen5 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen6_reg: vgen6 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&i2c3 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	status = "okay";
+
+	ov2659: camera@30 {
+		compatible = "ovti,ov2659";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ov2659>;
+		clocks = <&clks IMX6QDL_CLK_CKO>;
+		clock-names = "xvclk";
+		reg = <0x30>;
+		powerdown-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
+		status = "okay";
+
+		port {
+			ov2659_to_ipu1_csi0_mux: endpoint {
+				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
+				link-frequencies = /bits/ 64 <70000000>;
+				bus-width = <8>;
+				hsync-active = <1>;
+				vsync-active = <1>;
+			};
+		};
+	};
+};
+
+&iomuxc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hog>;
+
+	imx6qdl-ds {
+		pinctrl_hog: hoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
+				MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
+				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
+				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
+				MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
+			>;
+		};
+
+		pinctrl_ecspi1: ecspi1grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_ROW1__GPIO4_IO09	0x1b0b0
+				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
+				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK	0x100b1
+				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI	0x100b1
+				MX6QDL_PAD_EIM_D17__ECSPI1_MISO	0x100b1
+			>;
+		};
+
+		pinctrl_enet: enetgrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
+				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
+				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
+				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
+				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
+				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
+				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
+				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
+				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
+				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
+				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
+				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
+				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
+				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
+			>;
+		};
+
+		pinctrl_hdmi_cec: hdmicecgrp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE	0x1f8b0
+			>;
+		};
+
+		pinctrl_i2c2: i2c2grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1
+				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
+				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
+			>;
+		};
+
+		pinctrl_ipu1_csi0: ipu1csi0grp {
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0
+				MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0
+				MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0
+				MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0
+				MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0
+				MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0
+				MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0
+				MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0
+				MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0
+				MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0
+				MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0
+			>;
+		};
+
+		pinctrl_ov2659: ov2659grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0
+				MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
+			>;
+		};
+
+		pinctrl_uart4: uart4grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
+				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
+			>;
+		};
+
+		pinctrl_usbotg: usbotggrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
+			>;
+		};
+
+		pinctrl_usdhc1: usdhc1grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD1_CMD__SD1_CMD		0x17059
+				MX6QDL_PAD_SD1_CLK__SD1_CLK		0x10059
+				MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x17059
+				MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x17059
+				MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x17059
+				MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x17059
+				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0
+			>;
+		};
+
+		pinctrl_usdhc2: usdhc2grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
+				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
+				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
+				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
+				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
+				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
+			>;
+		};
+
+		pinctrl_usdhc3: usdhc3grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
+				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
+			>;
+		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_1__WDOG2_B		0x1b0b0
+			>;
+		};
+	};
+
+	gpio_leds {
+		pinctrl_gpio_leds: gpioledsgrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0
+			>;
+		};
+	};
+};
+
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart4>;
+	status = "okay";
+};
+
+&usbh1 {
+	vbus-supply = <&reg_usb_h1_vbus>;
+	status = "okay";
+};
+
+&usbotg {
+	vbus-supply = <&reg_usb_otg_vbus>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg>;
+	disable-over-current;
+	status = "okay";
+};
+
+&usdhc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc1>;
+	bus-width = <4>;
+	cd-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
+	status = "okay";
+};
+
+&usdhc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc2>;
+	bus-width = <4>;
+	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+	status = "disabled";
+};
+
+&usdhc3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	bus-width = <8>;
+	non-removable;
+	no-1-8-v;
+	status = "okay";
+};
+
+&wdog1 {
+	status = "okay";
+};
+
+&wdog2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+	status = "disabled";
+};
-- 
2.7.4


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 4/4] media: i2c: ov2659: Use clk_{prepare_enable, disable_unprepare}() to set xvclk on/off
  2021-04-15  4:05 [PATCH v3 0/4] arm: imx: Add i.mx6q DaSheng COM-9XX SBC board support dillon.minfei
                   ` (2 preceding siblings ...)
  2021-04-15  4:05 ` [PATCH v3 3/4] arm: dts: imx: Add i.mx6q DaSheng COM-9XX SBC board support dillon.minfei
@ 2021-04-15  4:05 ` dillon.minfei
  2021-04-20  6:45   ` dillon min
  3 siblings, 1 reply; 14+ messages in thread
From: dillon.minfei @ 2021-04-15  4:05 UTC (permalink / raw)
  To: krzysztof.kozlowski, robh+dt, shawnguo, krzk, linux,
	s.riedmueller, matthias.schiffer, leoyang.li, arnd, olof,
	s.hauer, kernel, festevam, prabhakar.csengg, mchehab
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-imx,
	linux-media, dillon min

From: dillon min <dillon.minfei@gmail.com>

On some platform(imx6q), xvclk might not switch on in advance,
also for power save purpose, xvclk should not be always on.
so, add clk_prepare_enable(), clk_disable_unprepare() in driver
side to set xvclk on/off at proper stage.

Add following changes:
- add 'struct clk *clk;' in 'struct ov2659 {}'
- enable xvclk in ov2659_power_on()
- disable xvclk in ov2659_power_off()

Signed-off-by: dillon min <dillon.minfei@gmail.com>
---
v3: optimize commit message

 drivers/media/i2c/ov2659.c | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/media/i2c/ov2659.c b/drivers/media/i2c/ov2659.c
index 42f64175a6df..fb78a1cedc03 100644
--- a/drivers/media/i2c/ov2659.c
+++ b/drivers/media/i2c/ov2659.c
@@ -204,6 +204,7 @@ struct ov2659 {
 	struct i2c_client *client;
 	struct v4l2_ctrl_handler ctrls;
 	struct v4l2_ctrl *link_frequency;
+	struct clk *clk;
 	const struct ov2659_framesize *frame_size;
 	struct sensor_register *format_ctrl_regs;
 	struct ov2659_pll_ctrl pll;
@@ -1270,6 +1271,8 @@ static int ov2659_power_off(struct device *dev)
 
 	gpiod_set_value(ov2659->pwdn_gpio, 1);
 
+	clk_disable_unprepare(ov2659->clk);
+
 	return 0;
 }
 
@@ -1278,9 +1281,17 @@ static int ov2659_power_on(struct device *dev)
 	struct i2c_client *client = to_i2c_client(dev);
 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
 	struct ov2659 *ov2659 = to_ov2659(sd);
+	int ret;
 
 	dev_dbg(&client->dev, "%s:\n", __func__);
 
+	ret = clk_prepare_enable(ov2659->clk);
+	if (ret) {
+		dev_err(&client->dev, "%s: failed to enable clock\n",
+			__func__);
+		return ret;
+	}
+
 	gpiod_set_value(ov2659->pwdn_gpio, 0);
 
 	if (ov2659->resetb_gpio) {
@@ -1425,7 +1436,6 @@ static int ov2659_probe(struct i2c_client *client)
 	const struct ov2659_platform_data *pdata = ov2659_get_pdata(client);
 	struct v4l2_subdev *sd;
 	struct ov2659 *ov2659;
-	struct clk *clk;
 	int ret;
 
 	if (!pdata) {
@@ -1440,11 +1450,11 @@ static int ov2659_probe(struct i2c_client *client)
 	ov2659->pdata = pdata;
 	ov2659->client = client;
 
-	clk = devm_clk_get(&client->dev, "xvclk");
-	if (IS_ERR(clk))
-		return PTR_ERR(clk);
+	ov2659->clk = devm_clk_get(&client->dev, "xvclk");
+	if (IS_ERR(ov2659->clk))
+		return PTR_ERR(ov2659->clk);
 
-	ov2659->xvclk_frequency = clk_get_rate(clk);
+	ov2659->xvclk_frequency = clk_get_rate(ov2659->clk);
 	if (ov2659->xvclk_frequency < 6000000 ||
 	    ov2659->xvclk_frequency > 27000000)
 		return -EINVAL;
@@ -1506,7 +1516,9 @@ static int ov2659_probe(struct i2c_client *client)
 	ov2659->frame_size = &ov2659_framesizes[2];
 	ov2659->format_ctrl_regs = ov2659_formats[0].format_ctrl_regs;
 
-	ov2659_power_on(&client->dev);
+	ret = ov2659_power_on(&client->dev);
+	if (ret < 0)
+		goto error;
 
 	ret = ov2659_detect(sd);
 	if (ret < 0)
-- 
2.7.4


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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 2/4] dt-bindings: arm: imx: Add i.mx6q DaSheng COM-9XX SBC
  2021-04-15  4:05 ` [PATCH v3 2/4] dt-bindings: arm: imx: Add i.mx6q DaSheng COM-9XX SBC dillon.minfei
@ 2021-04-15  6:29   ` Krzysztof Kozlowski
  2021-04-15 20:37   ` Rob Herring
  1 sibling, 0 replies; 14+ messages in thread
From: Krzysztof Kozlowski @ 2021-04-15  6:29 UTC (permalink / raw)
  To: dillon.minfei, robh+dt, shawnguo, krzk, linux, s.riedmueller,
	matthias.schiffer, leoyang.li, arnd, olof, s.hauer, kernel,
	festevam, prabhakar.csengg, mchehab
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-imx, linux-media

On 15/04/2021 06:05, dillon.minfei@gmail.com wrote:
> From: dillon min <dillon.minfei@gmail.com>
> 
> The DaSheng Com-9xx is and ARM based signle board computer (SBC)
> featuring:
> - i.MX6Q
> - 2GiB LPDDR3 DRAM
> - 8GiB eMMC 5.0 FLASH
> - 4MiB SPI Flash
> - USB 2.0 Host/Device
> - Multiple multi-protocol RS232/RS485 Serial ports
> - microSD socket
> - 5V DC power input
> - HDMI1.4a,1080p@60
> - RGMIIx1 Gigabit Ethernet
> - CSI0x1, connect with ov2659
> 
> Signed-off-by: dillon min <dillon.minfei@gmail.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> ---
> v3: move 'ds,imx6q-sbc' after 'dmo,imx6q-edmqmx6' to follow the alphabetical
> order.
> 
>  Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
>  1 file changed, 1 insertion(+)


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>


Best regards,
Krzysztof

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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 1/4] dt-bindings: add dasheng vendor prefix
  2021-04-15  4:05 ` [PATCH v3 1/4] dt-bindings: add dasheng vendor prefix dillon.minfei
@ 2021-04-15 20:37   ` Rob Herring
  0 siblings, 0 replies; 14+ messages in thread
From: Rob Herring @ 2021-04-15 20:37 UTC (permalink / raw)
  To: dillon.minfei
  Cc: krzk, linux-kernel, mchehab, linux, festevam, shawnguo, arnd,
	matthias.schiffer, robh+dt, devicetree, leoyang.li, s.hauer,
	linux-media, linux-arm-kernel, kernel, olof, prabhakar.csengg,
	linux-imx, s.riedmueller, krzysztof.kozlowski

On Thu, 15 Apr 2021 12:05:32 +0800, dillon.minfei@gmail.com wrote:
> From: dillon min <dillon.minfei@gmail.com>
> 
> Add vendor prefix for DaSheng, Inc.
> 
> Signed-off-by: dillon min <dillon.minfei@gmail.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> ---
> v3:
> - move v2 patch 4 to v3 patch 1
> - add 'Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>'
> 
>  Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 2/4] dt-bindings: arm: imx: Add i.mx6q DaSheng COM-9XX SBC
  2021-04-15  4:05 ` [PATCH v3 2/4] dt-bindings: arm: imx: Add i.mx6q DaSheng COM-9XX SBC dillon.minfei
  2021-04-15  6:29   ` Krzysztof Kozlowski
@ 2021-04-15 20:37   ` Rob Herring
  1 sibling, 0 replies; 14+ messages in thread
From: Rob Herring @ 2021-04-15 20:37 UTC (permalink / raw)
  To: dillon.minfei
  Cc: olof, arnd, matthias.schiffer, mchehab, krzk,
	krzysztof.kozlowski, linux-kernel, linux-media, linux, festevam,
	leoyang.li, linux-imx, prabhakar.csengg, s.riedmueller, s.hauer,
	linux-arm-kernel, robh+dt, kernel, devicetree, shawnguo

On Thu, 15 Apr 2021 12:05:33 +0800, dillon.minfei@gmail.com wrote:
> From: dillon min <dillon.minfei@gmail.com>
> 
> The DaSheng Com-9xx is and ARM based signle board computer (SBC)
> featuring:
> - i.MX6Q
> - 2GiB LPDDR3 DRAM
> - 8GiB eMMC 5.0 FLASH
> - 4MiB SPI Flash
> - USB 2.0 Host/Device
> - Multiple multi-protocol RS232/RS485 Serial ports
> - microSD socket
> - 5V DC power input
> - HDMI1.4a,1080p@60
> - RGMIIx1 Gigabit Ethernet
> - CSI0x1, connect with ov2659
> 
> Signed-off-by: dillon min <dillon.minfei@gmail.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> ---
> v3: move 'ds,imx6q-sbc' after 'dmo,imx6q-edmqmx6' to follow the alphabetical
> order.
> 
>  Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 3/4] arm: dts: imx: Add i.mx6q DaSheng COM-9XX SBC board support
  2021-04-15  4:05 ` [PATCH v3 3/4] arm: dts: imx: Add i.mx6q DaSheng COM-9XX SBC board support dillon.minfei
@ 2021-04-20  6:43   ` dillon min
  2021-04-20 14:27   ` Fabio Estevam
  1 sibling, 0 replies; 14+ messages in thread
From: dillon min @ 2021-04-20  6:43 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Shawn Guo, krzk, linux,
	s.riedmueller, matthias.schiffer, leoyang.li, arnd, olof,
	Sascha Hauer, kernel, festevam, prabhakar.csengg, mchehab
  Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Linux Kernel Mailing List, Linux ARM, linux-imx, linux-media

Hi,

Just a gentle ping, hope some expert could take a look, thanks.

Best regards.
Dillon

On Thu, Apr 15, 2021 at 12:05 PM <dillon.minfei@gmail.com> wrote:
>
> From: dillon min <dillon.minfei@gmail.com>
>
> The DaSheng Com-9xx is and ARM based signle board computer (SBC)
> featuring:
> - i.MX6Q
> - 2GiB LPDDR3 DRAM
> - 8GiB eMMC 5.0 FLASH
> - 4MiB SPI Flash
> - USB 2.0 Host/Device
> - Multiple multi-protocol RS232/RS485 Serial ports
> - microSD socket
> - 5V DC power input
> - HDMI1.4a,1080p@60
> - RGMIIx1 Gigabit Ethernet
> - CSI0x1, connect with ov2659
>
> Signed-off-by: dillon min <dillon.minfei@gmail.com>
> ---
> v3: move imx6q-ds.dtb after imx6q-dms-ba16.dtb to follow the alphabetical order
>
>  arch/arm/boot/dts/Makefile        |   1 +
>  arch/arm/boot/dts/imx6q-ds.dts    |  17 ++
>  arch/arm/boot/dts/imx6qdl-ds.dtsi | 465 ++++++++++++++++++++++++++++++++++++++
>  3 files changed, 483 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx6q-ds.dts
>  create mode 100644 arch/arm/boot/dts/imx6qdl-ds.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index a19c5ab9df84..425fe17ef7c1 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -510,6 +510,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
>         imx6q-display5-tianma-tm070-1280x768.dtb \
>         imx6q-dmo-edmqmx6.dtb \
>         imx6q-dms-ba16.dtb \
> +       imx6q-ds.dtb \
>         imx6q-emcon-avari.dtb \
>         imx6q-evi.dtb \
>         imx6q-gk802.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-ds.dts b/arch/arm/boot/dts/imx6q-ds.dts
> new file mode 100644
> index 000000000000..b0a63a133977
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-ds.dts
> @@ -0,0 +1,17 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +//
> +// Copyright 2021 Dillon Min <dillon.minfei@gmail.com>
> +//
> +// Based on imx6qdl-sabresd.dtsi which is:
> +// Copyright 2012 Freescale Semiconductor, Inc.
> +// Copyright 2011 Linaro Ltd.
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-ds.dtsi"
> +
> +/ {
> +       model = "DaSheng i.MX6 Quad Com-9xx Board";
> +       compatible = "ds,imx6q-sbc", "fsl,imx6q";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-ds.dtsi b/arch/arm/boot/dts/imx6qdl-ds.dtsi
> new file mode 100644
> index 000000000000..d28e065349cd
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-ds.dtsi
> @@ -0,0 +1,465 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +//
> +// Copyright 2021 Dillon Min <dillon.minfei@gmail.com>
> +//
> +// Based on imx6qdl-sabresd.dtsi which is:
> +// Copyright 2012 Freescale Semiconductor, Inc.
> +// Copyright 2011 Linaro Ltd.
> +
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> +       chosen {
> +               stdout-path = &uart1;
> +       };
> +
> +       memory@10000000 {
> +               device_type = "memory";
> +               reg = <0x10000000 0x80000000>;
> +       };
> +
> +       reg_usb_otg_vbus: regulator-usb-otg-vbus {
> +               compatible = "regulator-fixed";
> +               regulator-name = "usb_otg_vbus";
> +               regulator-min-microvolt = <5000000>;
> +               regulator-max-microvolt = <5000000>;
> +               regulator-always-on;
> +       };
> +
> +       reg_usb_h1_vbus: regulator-usb-h1-vbus {
> +               compatible = "regulator-fixed";
> +               regulator-name = "usb_h1_vbus";
> +               regulator-min-microvolt = <5000000>;
> +               regulator-max-microvolt = <5000000>;
> +               regulator-always-on;
> +       };
> +
> +       leds {
> +               compatible = "gpio-leds";
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&pinctrl_gpio_leds>;
> +
> +               green {
> +                       gpios = <&gpio4 8 0>;
> +                       default-state = "on";
> +                       linux,default-trigger = "heartbeat";
> +               };
> +       };
> +};
> +
> +&ipu1_csi0_from_ipu1_csi0_mux {
> +       bus-width = <8>;
> +       data-shift = <12>; /* Lines 19:12 used */
> +       hsync-active = <1>;
> +       vsync-active = <1>;
> +};
> +
> +&ipu1_csi0_mux_from_parallel_sensor {
> +       remote-endpoint = <&ov2659_to_ipu1_csi0_mux>;
> +};
> +
> +&ipu1_csi0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_ipu1_csi0>;
> +       status = "okay";
> +};
> +
> +&clks {
> +       assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
> +                         <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
> +       assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
> +                                <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
> +};
> +
> +&ecspi1 {
> +       cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_ecspi1>;
> +       status = "okay";
> +
> +       flash: m25p80@0 {
> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +               compatible = "st,m25p80", "jedec,spi-nor";
> +               spi-max-frequency = <20000000>;
> +               reg = <0>;
> +       };
> +};
> +
> +&fec {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_enet>;
> +       phy-mode = "rgmii-id";
> +       phy-handle = <&phy>;
> +       fsl,magic-packet;
> +       status = "okay";
> +
> +       mdio {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               phy: ethernet-phy@1 {
> +                       reg = <1>;
> +                       qca,clk-out-frequency = <125000000>;
> +                       reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
> +                       reset-assert-us = <10000>;
> +               };
> +       };
> +};
> +
> +&hdmi {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_hdmi_cec>;
> +       ddc-i2c-bus = <&i2c3>;
> +       status = "okay";
> +};
> +
> +&i2c2 {
> +       clock-frequency = <100000>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_i2c2>;
> +       status = "okay";
> +
> +       pmic: pfuze100@8 {
> +               compatible = "fsl,pfuze100";
> +               reg = <0x08>;
> +
> +               regulators {
> +                       sw1a_reg: sw1ab {
> +                               regulator-min-microvolt = <300000>;
> +                               regulator-max-microvolt = <1875000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                               regulator-ramp-delay = <6250>;
> +                       };
> +
> +                       sw1c_reg: sw1c {
> +                               regulator-min-microvolt = <300000>;
> +                               regulator-max-microvolt = <1875000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                               regulator-ramp-delay = <6250>;
> +                       };
> +
> +                       sw2_reg: sw2 {
> +                               regulator-min-microvolt = <800000>;
> +                               regulator-max-microvolt = <3300000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                               regulator-ramp-delay = <6250>;
> +                       };
> +
> +                       sw3a_reg: sw3a {
> +                               regulator-min-microvolt = <400000>;
> +                               regulator-max-microvolt = <1975000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +
> +                       sw3b_reg: sw3b {
> +                               regulator-min-microvolt = <400000>;
> +                               regulator-max-microvolt = <1975000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +
> +                       sw4_reg: sw4 {
> +                               regulator-min-microvolt = <800000>;
> +                               regulator-max-microvolt = <3300000>;
> +                               regulator-always-on;
> +                       };
> +
> +                       swbst_reg: swbst {
> +                               regulator-min-microvolt = <5000000>;
> +                               regulator-max-microvolt = <5150000>;
> +                       };
> +
> +                       snvs_reg: vsnvs {
> +                               regulator-min-microvolt = <1000000>;
> +                               regulator-max-microvolt = <3000000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +
> +                       vref_reg: vrefddr {
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +
> +                       vgen1_reg: vgen1 {
> +                               regulator-min-microvolt = <800000>;
> +                               regulator-max-microvolt = <1550000>;
> +                       };
> +
> +                       vgen2_reg: vgen2 {
> +                               regulator-min-microvolt = <800000>;
> +                               regulator-max-microvolt = <1550000>;
> +                       };
> +
> +                       vgen3_reg: vgen3 {
> +                               regulator-min-microvolt = <1800000>;
> +                               regulator-max-microvolt = <3300000>;
> +                       };
> +
> +                       vgen4_reg: vgen4 {
> +                               regulator-min-microvolt = <1800000>;
> +                               regulator-max-microvolt = <3300000>;
> +                               regulator-always-on;
> +                       };
> +
> +                       vgen5_reg: vgen5 {
> +                               regulator-min-microvolt = <1800000>;
> +                               regulator-max-microvolt = <3300000>;
> +                               regulator-always-on;
> +                       };
> +
> +                       vgen6_reg: vgen6 {
> +                               regulator-min-microvolt = <1800000>;
> +                               regulator-max-microvolt = <3300000>;
> +                               regulator-always-on;
> +                       };
> +               };
> +       };
> +};
> +
> +&i2c3 {
> +       clock-frequency = <100000>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_i2c3>;
> +       status = "okay";
> +
> +       ov2659: camera@30 {
> +               compatible = "ovti,ov2659";
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&pinctrl_ov2659>;
> +               clocks = <&clks IMX6QDL_CLK_CKO>;
> +               clock-names = "xvclk";
> +               reg = <0x30>;
> +               powerdown-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
> +               reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
> +               status = "okay";
> +
> +               port {
> +                       ov2659_to_ipu1_csi0_mux: endpoint {
> +                               remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
> +                               link-frequencies = /bits/ 64 <70000000>;
> +                               bus-width = <8>;
> +                               hsync-active = <1>;
> +                               vsync-active = <1>;
> +                       };
> +               };
> +       };
> +};
> +
> +&iomuxc {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_hog>;
> +
> +       imx6qdl-ds {
> +               pinctrl_hog: hoggrp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
> +                               MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
> +                               MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
> +                               MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
> +                               MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
> +                       >;
> +               };
> +
> +               pinctrl_ecspi1: ecspi1grp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
> +                               MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
> +                               MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
> +                               MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
> +                               MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
> +                       >;
> +               };
> +
> +               pinctrl_enet: enetgrp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
> +                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
> +                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
> +                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
> +                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
> +                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
> +                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
> +                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
> +                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
> +                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
> +                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
> +                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
> +                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
> +                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
> +                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
> +                       >;
> +               };
> +
> +               pinctrl_hdmi_cec: hdmicecgrp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE    0x1f8b0
> +                       >;
> +               };
> +
> +               pinctrl_i2c2: i2c2grp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_EIM_EB2__I2C2_SCL            0x4001b8b1
> +                               MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
> +                       >;
> +               };
> +
> +               pinctrl_i2c3: i2c3grp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
> +                               MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
> +                       >;
> +               };
> +
> +               pinctrl_ipu1_csi0: ipu1csi0grp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0
> +                               MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0
> +                               MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0
> +                               MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0
> +                               MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0
> +                               MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0
> +                               MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0
> +                               MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0
> +                               MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0
> +                               MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0
> +                               MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0
> +                       >;
> +               };
> +
> +               pinctrl_ov2659: ov2659grp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0
> +                               MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
> +                       >;
> +               };
> +
> +               pinctrl_uart4: uart4grp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
> +                               MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA      0x1b0b1
> +                       >;
> +               };
> +
> +               pinctrl_usbotg: usbotggrp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
> +                       >;
> +               };
> +
> +               pinctrl_usdhc1: usdhc1grp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_SD1_CMD__SD1_CMD             0x17059
> +                               MX6QDL_PAD_SD1_CLK__SD1_CLK             0x10059
> +                               MX6QDL_PAD_SD1_DAT0__SD1_DATA0          0x17059
> +                               MX6QDL_PAD_SD1_DAT1__SD1_DATA1          0x17059
> +                               MX6QDL_PAD_SD1_DAT2__SD1_DATA2          0x17059
> +                               MX6QDL_PAD_SD1_DAT3__SD1_DATA3          0x17059
> +                               MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x1b0b0
> +                       >;
> +               };
> +
> +               pinctrl_usdhc2: usdhc2grp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
> +                               MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
> +                               MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
> +                               MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
> +                               MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
> +                               MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
> +                       >;
> +               };
> +
> +               pinctrl_usdhc3: usdhc3grp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
> +                               MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
> +                               MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
> +                               MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
> +                               MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
> +                               MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
> +                               MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
> +                               MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
> +                               MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
> +                               MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
> +                       >;
> +               };
> +
> +               pinctrl_wdog: wdoggrp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_GPIO_1__WDOG2_B              0x1b0b0
> +                       >;
> +               };
> +       };
> +
> +       gpio_leds {
> +               pinctrl_gpio_leds: gpioledsgrp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0
> +                       >;
> +               };
> +       };
> +};
> +
> +&uart4 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_uart4>;
> +       status = "okay";
> +};
> +
> +&usbh1 {
> +       vbus-supply = <&reg_usb_h1_vbus>;
> +       status = "okay";
> +};
> +
> +&usbotg {
> +       vbus-supply = <&reg_usb_otg_vbus>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_usbotg>;
> +       disable-over-current;
> +       status = "okay";
> +};
> +
> +&usdhc1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_usdhc1>;
> +       bus-width = <4>;
> +       cd-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
> +       status = "okay";
> +};
> +
> +&usdhc2 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_usdhc2>;
> +       bus-width = <4>;
> +       cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
> +       wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
> +       status = "disabled";
> +};
> +
> +&usdhc3 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_usdhc3>;
> +       bus-width = <8>;
> +       non-removable;
> +       no-1-8-v;
> +       status = "okay";
> +};
> +
> +&wdog1 {
> +       status = "okay";
> +};
> +
> +&wdog2 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_wdog>;
> +       fsl,ext-reset-output;
> +       status = "disabled";
> +};
> --
> 2.7.4
>

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^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 4/4] media: i2c: ov2659: Use clk_{prepare_enable, disable_unprepare}() to set xvclk on/off
  2021-04-15  4:05 ` [PATCH v3 4/4] media: i2c: ov2659: Use clk_{prepare_enable, disable_unprepare}() to set xvclk on/off dillon.minfei
@ 2021-04-20  6:45   ` dillon min
  2021-04-20  6:52     ` Krzysztof Kozlowski
  0 siblings, 1 reply; 14+ messages in thread
From: dillon min @ 2021-04-20  6:45 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Shawn Guo, krzk, linux,
	s.riedmueller, matthias.schiffer, leoyang.li, arnd, olof,
	Sascha Hauer, kernel, festevam, prabhakar.csengg, mchehab
  Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Linux Kernel Mailing List, Linux ARM, linux-imx, linux-media

Hi All,

Just a gentle ping, hope some expert could take a look, thanks.

Best regards.
Dillon

On Thu, Apr 15, 2021 at 12:06 PM <dillon.minfei@gmail.com> wrote:
>
> From: dillon min <dillon.minfei@gmail.com>
>
> On some platform(imx6q), xvclk might not switch on in advance,
> also for power save purpose, xvclk should not be always on.
> so, add clk_prepare_enable(), clk_disable_unprepare() in driver
> side to set xvclk on/off at proper stage.
>
> Add following changes:
> - add 'struct clk *clk;' in 'struct ov2659 {}'
> - enable xvclk in ov2659_power_on()
> - disable xvclk in ov2659_power_off()
>
> Signed-off-by: dillon min <dillon.minfei@gmail.com>
> ---
> v3: optimize commit message
>
>  drivers/media/i2c/ov2659.c | 24 ++++++++++++++++++------
>  1 file changed, 18 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/media/i2c/ov2659.c b/drivers/media/i2c/ov2659.c
> index 42f64175a6df..fb78a1cedc03 100644
> --- a/drivers/media/i2c/ov2659.c
> +++ b/drivers/media/i2c/ov2659.c
> @@ -204,6 +204,7 @@ struct ov2659 {
>         struct i2c_client *client;
>         struct v4l2_ctrl_handler ctrls;
>         struct v4l2_ctrl *link_frequency;
> +       struct clk *clk;
>         const struct ov2659_framesize *frame_size;
>         struct sensor_register *format_ctrl_regs;
>         struct ov2659_pll_ctrl pll;
> @@ -1270,6 +1271,8 @@ static int ov2659_power_off(struct device *dev)
>
>         gpiod_set_value(ov2659->pwdn_gpio, 1);
>
> +       clk_disable_unprepare(ov2659->clk);
> +
>         return 0;
>  }
>
> @@ -1278,9 +1281,17 @@ static int ov2659_power_on(struct device *dev)
>         struct i2c_client *client = to_i2c_client(dev);
>         struct v4l2_subdev *sd = i2c_get_clientdata(client);
>         struct ov2659 *ov2659 = to_ov2659(sd);
> +       int ret;
>
>         dev_dbg(&client->dev, "%s:\n", __func__);
>
> +       ret = clk_prepare_enable(ov2659->clk);
> +       if (ret) {
> +               dev_err(&client->dev, "%s: failed to enable clock\n",
> +                       __func__);
> +               return ret;
> +       }
> +
>         gpiod_set_value(ov2659->pwdn_gpio, 0);
>
>         if (ov2659->resetb_gpio) {
> @@ -1425,7 +1436,6 @@ static int ov2659_probe(struct i2c_client *client)
>         const struct ov2659_platform_data *pdata = ov2659_get_pdata(client);
>         struct v4l2_subdev *sd;
>         struct ov2659 *ov2659;
> -       struct clk *clk;
>         int ret;
>
>         if (!pdata) {
> @@ -1440,11 +1450,11 @@ static int ov2659_probe(struct i2c_client *client)
>         ov2659->pdata = pdata;
>         ov2659->client = client;
>
> -       clk = devm_clk_get(&client->dev, "xvclk");
> -       if (IS_ERR(clk))
> -               return PTR_ERR(clk);
> +       ov2659->clk = devm_clk_get(&client->dev, "xvclk");
> +       if (IS_ERR(ov2659->clk))
> +               return PTR_ERR(ov2659->clk);
>
> -       ov2659->xvclk_frequency = clk_get_rate(clk);
> +       ov2659->xvclk_frequency = clk_get_rate(ov2659->clk);
>         if (ov2659->xvclk_frequency < 6000000 ||
>             ov2659->xvclk_frequency > 27000000)
>                 return -EINVAL;
> @@ -1506,7 +1516,9 @@ static int ov2659_probe(struct i2c_client *client)
>         ov2659->frame_size = &ov2659_framesizes[2];
>         ov2659->format_ctrl_regs = ov2659_formats[0].format_ctrl_regs;
>
> -       ov2659_power_on(&client->dev);
> +       ret = ov2659_power_on(&client->dev);
> +       if (ret < 0)
> +               goto error;
>
>         ret = ov2659_detect(sd);
>         if (ret < 0)
> --
> 2.7.4
>

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^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 4/4] media: i2c: ov2659: Use clk_{prepare_enable, disable_unprepare}() to set xvclk on/off
  2021-04-20  6:45   ` dillon min
@ 2021-04-20  6:52     ` Krzysztof Kozlowski
  2021-04-20  7:02       ` dillon min
  0 siblings, 1 reply; 14+ messages in thread
From: Krzysztof Kozlowski @ 2021-04-20  6:52 UTC (permalink / raw)
  To: dillon min
  Cc: Rob Herring, Shawn Guo, krzk, linux, s.riedmueller,
	matthias.schiffer, leoyang.li, arnd, olof, Sascha Hauer, kernel,
	festevam, prabhakar.csengg, mchehab,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Linux Kernel Mailing List, Linux ARM, linux-imx, linux-media

On Tue, 20 Apr 2021 at 08:46, dillon min <dillon.minfei@gmail.com> wrote:
>
> Hi All,
>
> Just a gentle ping, hope some expert could take a look, thanks.

Don't ping people after 5 days. It's not gentle.

Best regards,
Krzysztof

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^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 4/4] media: i2c: ov2659: Use clk_{prepare_enable, disable_unprepare}() to set xvclk on/off
  2021-04-20  6:52     ` Krzysztof Kozlowski
@ 2021-04-20  7:02       ` dillon min
  0 siblings, 0 replies; 14+ messages in thread
From: dillon min @ 2021-04-20  7:02 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Rob Herring, Shawn Guo, krzk, linux, s.riedmueller,
	matthias.schiffer, leoyang.li, arnd, olof, Sascha Hauer, kernel,
	festevam, prabhakar.csengg, mchehab,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Linux Kernel Mailing List, Linux ARM, linux-imx, linux-media

On Tue, Apr 20, 2021 at 2:52 PM Krzysztof Kozlowski
<krzysztof.kozlowski@canonical.com> wrote:
>
> On Tue, 20 Apr 2021 at 08:46, dillon min <dillon.minfei@gmail.com> wrote:
> >
> > Hi All,
> >
> > Just a gentle ping, hope some expert could take a look, thanks.
>
> Don't ping people after 5 days. It's not gentle.
Got it, thanks for reminding me.

Best regards,
Dillon
>
> Best regards,
> Krzysztof

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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 3/4] arm: dts: imx: Add i.mx6q DaSheng COM-9XX SBC board support
  2021-04-15  4:05 ` [PATCH v3 3/4] arm: dts: imx: Add i.mx6q DaSheng COM-9XX SBC board support dillon.minfei
  2021-04-20  6:43   ` dillon min
@ 2021-04-20 14:27   ` Fabio Estevam
  2021-04-21  3:40     ` dillon min
  1 sibling, 1 reply; 14+ messages in thread
From: Fabio Estevam @ 2021-04-20 14:27 UTC (permalink / raw)
  To: dillon.minfei
  Cc: krzysztof.kozlowski, Rob Herring, Shawn Guo, Krzysztof Kozlowski,
	Oleksij Rempel, Stefan Riedmueller, Matthias Schiffer,
	leoyang.li, arnd, olof, s.hauer, kernel, prabhakar.csengg,
	mchehab, devicetree, linux-kernel, linux-arm-kernel, linux-imx,
	linux-media

Hi Dillon,

On Thu, Apr 15, 2021 at 1:05 AM <dillon.minfei@gmail.com> wrote:

> +               green {
> +                       gpios = <&gpio4 8 0>;

Please use GPIO_ACTIVE_HIGH label instead:
gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;

> +&clks {
> +       assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
> +                         <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
> +       assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
> +                                <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
> +};

You are setting the LDB clock parent, but you don't use LDB in this
devicetree. You could simply remove this.

> +&ecspi1 {
> +       cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_ecspi1>;
> +       status = "okay";
> +
> +       flash: m25p80@0 {

Node names should be generic:

m25p80: flash@0

> +&iomuxc {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_hog>;
> +
> +       imx6qdl-ds {
> +               pinctrl_hog: hoggrp {
> +                       fsl,pins = <
> +                               MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
> +                               MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
> +                               MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0

This could be part of the pinctrl_ov2659 group as it provides the
clock for the camera.

Please try to keep in the hoggrp only the pins that cannot be
controlled by any other node.

> +&wdog1 {
> +       status = "okay";
> +};
> +
> +&wdog2 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_wdog>;
> +       fsl,ext-reset-output;
> +       status = "disabled";

Wouldn't it be better to enable wdog2 and disable wdog1 instead? wdog2
provides a POR, which is preferred.

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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 3/4] arm: dts: imx: Add i.mx6q DaSheng COM-9XX SBC board support
  2021-04-20 14:27   ` Fabio Estevam
@ 2021-04-21  3:40     ` dillon min
  0 siblings, 0 replies; 14+ messages in thread
From: dillon min @ 2021-04-21  3:40 UTC (permalink / raw)
  To: Fabio Estevam
  Cc: Krzysztof Kozlowski, Rob Herring, Shawn Guo, Krzysztof Kozlowski,
	Oleksij Rempel, Stefan Riedmueller, Matthias Schiffer,
	leoyang.li, arnd, olof, Sascha Hauer, kernel, prabhakar.csengg,
	mchehab,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Linux Kernel Mailing List, Linux ARM, linux-imx, linux-media

Hi Fabio,

Thanks for quick reply.

On Tue, Apr 20, 2021 at 10:27 PM Fabio Estevam <festevam@gmail.com> wrote:
>
> Hi Dillon,
>
> On Thu, Apr 15, 2021 at 1:05 AM <dillon.minfei@gmail.com> wrote:
>
> > +               green {
> > +                       gpios = <&gpio4 8 0>;
>
> Please use GPIO_ACTIVE_HIGH label instead:
> gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
>
> > +&clks {
> > +       assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
> > +                         <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
> > +       assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
> > +                                <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
> > +};
>
> You are setting the LDB clock parent, but you don't use LDB in this
> devicetree. You could simply remove this.
Agree, thanks.
>
> > +&ecspi1 {
> > +       cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
> > +       pinctrl-names = "default";
> > +       pinctrl-0 = <&pinctrl_ecspi1>;
> > +       status = "okay";
> > +
> > +       flash: m25p80@0 {
>
> Node names should be generic:
>
> m25p80: flash@0
Agree, thanks.
>
> > +&iomuxc {
> > +       pinctrl-names = "default";
> > +       pinctrl-0 = <&pinctrl_hog>;
> > +
> > +       imx6qdl-ds {
> > +               pinctrl_hog: hoggrp {
> > +                       fsl,pins = <
> > +                               MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
> > +                               MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
> > +                               MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
>
> This could be part of the pinctrl_ov2659 group as it provides the
> clock for the camera.
>
> Please try to keep in the hoggrp only the pins that cannot be
> controlled by any other node.
Agree, after moving these pinctrl to corresponding component's group,
the hoggrp is useless.
so, I removed it in v4.
>
> > +&wdog1 {
> > +       status = "okay";
> > +};
> > +
> > +&wdog2 {
> > +       pinctrl-names = "default";
> > +       pinctrl-0 = <&pinctrl_wdog>;
> > +       fsl,ext-reset-output;
> > +       status = "disabled";
>
> Wouldn't it be better to enable wdog2 and disable wdog1 instead? wdog2
> provides a POR, which is preferred.
Agree, thanks.

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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 14+ messages in thread

end of thread, back to index

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-04-15  4:05 [PATCH v3 0/4] arm: imx: Add i.mx6q DaSheng COM-9XX SBC board support dillon.minfei
2021-04-15  4:05 ` [PATCH v3 1/4] dt-bindings: add dasheng vendor prefix dillon.minfei
2021-04-15 20:37   ` Rob Herring
2021-04-15  4:05 ` [PATCH v3 2/4] dt-bindings: arm: imx: Add i.mx6q DaSheng COM-9XX SBC dillon.minfei
2021-04-15  6:29   ` Krzysztof Kozlowski
2021-04-15 20:37   ` Rob Herring
2021-04-15  4:05 ` [PATCH v3 3/4] arm: dts: imx: Add i.mx6q DaSheng COM-9XX SBC board support dillon.minfei
2021-04-20  6:43   ` dillon min
2021-04-20 14:27   ` Fabio Estevam
2021-04-21  3:40     ` dillon min
2021-04-15  4:05 ` [PATCH v3 4/4] media: i2c: ov2659: Use clk_{prepare_enable, disable_unprepare}() to set xvclk on/off dillon.minfei
2021-04-20  6:45   ` dillon min
2021-04-20  6:52     ` Krzysztof Kozlowski
2021-04-20  7:02       ` dillon min

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