[PATCH v5 0/6] Allwinner H6 Mali GPU support

[PATCH v5 0/6] Allwinner H6 Mali GPU support

[Clément Péron]

Hi,

The Allwinner H6 has a Mali-T720 MP2 which should be supported by
the new panfrost driver. This series fix two issues and introduce the
dt-bindings but a simple benchmark show that it's still NOT WORKING.

I'm pushing it in case someone want to continue the work.

This has been tested with Mesa3D 19.1.0-RC2 and a GPU bitness patch[1].

One patch is from Icenowy Zheng where I changed the order has required
by Rob Herring[2].

Thanks,
Clement

[1] https://gitlab.freedesktop.org/kszaq/mesa/tree/panfrost_64_32
[2] https://patchwork.kernel.org/patch/10699829/

[  345.204813] panfrost 1800000.gpu: mmu irq status=1
[  345.209617] panfrost 1800000.gpu: Unhandled Page fault in AS0 at VA
0x0000000002400400
[  345.209617] Reason: TODO
[  345.209617] raw fault status: 0x800002C1
[  345.209617] decoded fault status: SLAVE FAULT
[  345.209617] exception type 0xC1: TRANSLATION_FAULT_LEVEL1
[  345.209617] access type 0x2: READ
[  345.209617] source id 0x8000
[  345.729957] panfrost 1800000.gpu: gpu sched timeout, js=0,
status=0x8, head=0x2400400, tail=0x2400400, sched_job=000000009e204de9
[  346.055876] panfrost 1800000.gpu: mmu irq status=1
[  346.060680] panfrost 1800000.gpu: Unhandled Page fault in AS0 at VA
0x0000000002C00A00
[  346.060680] Reason: TODO
[  346.060680] raw fault status: 0x810002C1
[  346.060680] decoded fault status: SLAVE FAULT
[  346.060680] exception type 0xC1: TRANSLATION_FAULT_LEVEL1
[  346.060680] access type 0x2: READ
[  346.060680] source id 0x8100
[  346.561955] panfrost 1800000.gpu: gpu sched timeout, js=1,
status=0x8, head=0x2c00a00, tail=0x2c00a00, sched_job=00000000b55a9a85
[  346.573913] panfrost 1800000.gpu: mmu irq status=1
[  346.578707] panfrost 1800000.gpu: Unhandled Page fault in AS0 at VA
0x0000000002C00B80

Changes in v4:
 - Add bus_clock probe
 - Fix sanity check in io-pgtable
 - Add vramp-delay
 - Merge all boards into one patch
 - Remove upstreamed Neil A. patch

Changes in v3 (Thanks to Maxime Ripard):
 - Reauthor Icenowy for her path

Changes in v2 (Thanks to Maxime Ripard):
 - Drop GPU OPP Table
 - Add clocks and clock-names in required

Clément Péron (5):
  drm: panfrost: add optional bus_clock
  iommu: io-pgtable: fix sanity check for non 48-bit mali iommu
  dt-bindings: gpu: mali-midgard: Add H6 mali gpu compatible
  arm64: dts: allwinner: Add ARM Mali GPU node for H6
  arm64: dts: allwinner: Add mali GPU supply for H6 boards

Icenowy Zheng (1):
  dt-bindings: gpu: add bus clock for Mali Midgard GPUs

 .../bindings/gpu/arm,mali-midgard.txt         | 15 ++++++++++-
 .../dts/allwinner/sun50i-h6-beelink-gs1.dts   |  6 +++++
 .../dts/allwinner/sun50i-h6-orangepi-3.dts    |  6 +++++
 .../dts/allwinner/sun50i-h6-orangepi.dtsi     |  6 +++++
 .../boot/dts/allwinner/sun50i-h6-pine-h64.dts |  6 +++++
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  | 14 +++++++++++
 drivers/gpu/drm/panfrost/panfrost_device.c    | 25 ++++++++++++++++++-
 drivers/gpu/drm/panfrost/panfrost_device.h    |  1 +
 drivers/iommu/io-pgtable-arm.c                |  2 +-
 9 files changed, 78 insertions(+), 3 deletions(-)

-- 
2.17.1


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[PATCH v5 1/6] drm: panfrost: add optional bus_clock

[Clément Péron]

Allwinner H6 has an ARM Mali-T720 MP2 which required a bus_clock.

Add an optional bus_clock at the init of the panfrost driver.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
 drivers/gpu/drm/panfrost/panfrost_device.c | 25 +++++++++++++++++++++-
 drivers/gpu/drm/panfrost/panfrost_device.h |  1 +
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
index 3b2bced1b015..8da6e612d384 100644
--- a/drivers/gpu/drm/panfrost/panfrost_device.c
+++ b/drivers/gpu/drm/panfrost/panfrost_device.c
@@ -44,7 +44,8 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
 
 	pfdev->clock = devm_clk_get(pfdev->dev, NULL);
 	if (IS_ERR(pfdev->clock)) {
-		dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock));
+		dev_err(pfdev->dev, "get clock failed %ld\n",
+			PTR_ERR(pfdev->clock));
 		return PTR_ERR(pfdev->clock);
 	}
 
@@ -55,11 +56,33 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
 	if (err)
 		return err;
 
+	pfdev->bus_clock = devm_clk_get_optional(pfdev->dev, "bus");
+	if (IS_ERR(pfdev->bus_clock)) {
+		dev_err(pfdev->dev, "get bus_clock failed %ld\n",
+			PTR_ERR(pfdev->bus_clock));
+		return PTR_ERR(pfdev->bus_clock);
+	}
+
+	if (pfdev->bus_clock) {
+		rate = clk_get_rate(pfdev->bus_clock);
+		dev_info(pfdev->dev, "bus_clock rate = %lu\n", rate);
+
+		err = clk_prepare_enable(pfdev->bus_clock);
+		if (err)
+			goto disable_clock;
+	}
+
 	return 0;
+
+disable_clock:
+	clk_disable_unprepare(pfdev->clock);
+
+	return err;
 }
 
 static void panfrost_clk_fini(struct panfrost_device *pfdev)
 {
+	clk_disable_unprepare(pfdev->bus_clock);
 	clk_disable_unprepare(pfdev->clock);
 }
 
diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
index 56f452dfb490..8074f221034b 100644
--- a/drivers/gpu/drm/panfrost/panfrost_device.h
+++ b/drivers/gpu/drm/panfrost/panfrost_device.h
@@ -66,6 +66,7 @@ struct panfrost_device {
 
 	void __iomem *iomem;
 	struct clk *clock;
+	struct clk *bus_clock;
 	struct regulator *regulator;
 	struct reset_control *rstc;
 
-- 
2.17.1


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Re: [PATCH v5 1/6] drm: panfrost: add optional bus_clock

[Rob Herring]

On Fri, May 17, 2019 at 1:47 PM Clément Péron <peron.clem@gmail.com> wrote:
>
> Allwinner H6 has an ARM Mali-T720 MP2 which required a bus_clock.
>
> Add an optional bus_clock at the init of the panfrost driver.
>
> Signed-off-by: Clément Péron <peron.clem@gmail.com>
> ---
>  drivers/gpu/drm/panfrost/panfrost_device.c | 25 +++++++++++++++++++++-
>  drivers/gpu/drm/panfrost/panfrost_device.h |  1 +
>  2 files changed, 25 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
> index 3b2bced1b015..8da6e612d384 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> @@ -44,7 +44,8 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
>
>         pfdev->clock = devm_clk_get(pfdev->dev, NULL);
>         if (IS_ERR(pfdev->clock)) {
> -               dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock));
> +               dev_err(pfdev->dev, "get clock failed %ld\n",
> +                       PTR_ERR(pfdev->clock));

Please drop this whitespace change.

>                 return PTR_ERR(pfdev->clock);
>         }
>

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Re: [PATCH v5 1/6] drm: panfrost: add optional bus_clock

[Clément Péron]

Hi Rob,

On Fri, 17 May 2019 at 22:07, Rob Herring <robh+dt@kernel.org> wrote:
>
> On Fri, May 17, 2019 at 1:47 PM Clément Péron <peron.clem@gmail.com> wrote:
> >
> > Allwinner H6 has an ARM Mali-T720 MP2 which required a bus_clock.
> >
> > Add an optional bus_clock at the init of the panfrost driver.
> >
> > Signed-off-by: Clément Péron <peron.clem@gmail.com>
> > ---
> >  drivers/gpu/drm/panfrost/panfrost_device.c | 25 +++++++++++++++++++++-
> >  drivers/gpu/drm/panfrost/panfrost_device.h |  1 +
> >  2 files changed, 25 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
> > index 3b2bced1b015..8da6e612d384 100644
> > --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> > +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> > @@ -44,7 +44,8 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
> >
> >         pfdev->clock = devm_clk_get(pfdev->dev, NULL);
> >         if (IS_ERR(pfdev->clock)) {
> > -               dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock));
> > +               dev_err(pfdev->dev, "get clock failed %ld\n",
> > +                       PTR_ERR(pfdev->clock));
>
> Please drop this whitespace change.

Sorry, I thought it was only a mistake here, I will drop it.
Why are they so many lines over 80 characters?
Is there a specific coding style to follow ?

Thanks,
Clement

>
> >                 return PTR_ERR(pfdev->clock);
> >         }
> >

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Re: [PATCH v5 1/6] drm: panfrost: add optional bus_clock

[Rob Herring]

On Fri, May 17, 2019 at 5:08 PM Clément Péron <peron.clem@gmail.com> wrote:
>
> Hi Rob,
>
> On Fri, 17 May 2019 at 22:07, Rob Herring <robh+dt@kernel.org> wrote:
> >
> > On Fri, May 17, 2019 at 1:47 PM Clément Péron <peron.clem@gmail.com> wrote:
> > >
> > > Allwinner H6 has an ARM Mali-T720 MP2 which required a bus_clock.
> > >
> > > Add an optional bus_clock at the init of the panfrost driver.
> > >
> > > Signed-off-by: Clément Péron <peron.clem@gmail.com>
> > > ---
> > >  drivers/gpu/drm/panfrost/panfrost_device.c | 25 +++++++++++++++++++++-
> > >  drivers/gpu/drm/panfrost/panfrost_device.h |  1 +
> > >  2 files changed, 25 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
> > > index 3b2bced1b015..8da6e612d384 100644
> > > --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> > > +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> > > @@ -44,7 +44,8 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
> > >
> > >         pfdev->clock = devm_clk_get(pfdev->dev, NULL);
> > >         if (IS_ERR(pfdev->clock)) {
> > > -               dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock));
> > > +               dev_err(pfdev->dev, "get clock failed %ld\n",
> > > +                       PTR_ERR(pfdev->clock));
> >
> > Please drop this whitespace change.
>
> Sorry, I thought it was only a mistake here, I will drop it.
> Why are they so many lines over 80 characters?

I'd guess most are prints and/or just slightly over.

> Is there a specific coding style to follow ?

Yes, but generally the 80 character thing is more a guidance. Not
having unrelated changes in a single commit is more of a hard rule.

Rob

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Re: [PATCH v5 1/6] drm: panfrost: add optional bus_clock

[Clément Péron]

Hi,

On Sat, 18 May 2019 at 00:17, Rob Herring <robh+dt@kernel.org> wrote:
>
> On Fri, May 17, 2019 at 5:08 PM Clément Péron <peron.clem@gmail.com> wrote:
> >
> > Hi Rob,
> >
> > On Fri, 17 May 2019 at 22:07, Rob Herring <robh+dt@kernel.org> wrote:
> > >
> > > On Fri, May 17, 2019 at 1:47 PM Clément Péron <peron.clem@gmail.com> wrote:
> > > >
> > > > Allwinner H6 has an ARM Mali-T720 MP2 which required a bus_clock.
> > > >
> > > > Add an optional bus_clock at the init of the panfrost driver.
> > > >
> > > > Signed-off-by: Clément Péron <peron.clem@gmail.com>
> > > > ---
> > > >  drivers/gpu/drm/panfrost/panfrost_device.c | 25 +++++++++++++++++++++-
> > > >  drivers/gpu/drm/panfrost/panfrost_device.h |  1 +
> > > >  2 files changed, 25 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c
> > > > index 3b2bced1b015..8da6e612d384 100644
> > > > --- a/drivers/gpu/drm/panfrost/panfrost_device.c
> > > > +++ b/drivers/gpu/drm/panfrost/panfrost_device.c
> > > > @@ -44,7 +44,8 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
> > > >
> > > >         pfdev->clock = devm_clk_get(pfdev->dev, NULL);
> > > >         if (IS_ERR(pfdev->clock)) {
> > > > -               dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock));
> > > > +               dev_err(pfdev->dev, "get clock failed %ld\n",
> > > > +                       PTR_ERR(pfdev->clock));
> > >
> > > Please drop this whitespace change.
> >
> > Sorry, I thought it was only a mistake here, I will drop it.
> > Why are they so many lines over 80 characters?
>
> I'd guess most are prints and/or just slightly over.
>
> > Is there a specific coding style to follow ?
>
> Yes, but generally the 80 character thing is more a guidance. Not
> having unrelated changes in a single commit is more of a hard rule.

Ok, thanks for the clarification.

Clément

>
> Rob

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[PATCH v5 2/6] iommu: io-pgtable: fix sanity check for non 48-bit mali iommu

[Clément Péron]

Allwinner H6 SoC has a Mali T720MP2 with a 33-bit iommu which
trig the sanity check during the alloc of the pgtable.

Change the sanity check to allow non 48-bit configuration.

Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
 drivers/iommu/io-pgtable-arm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
index 4e21efbc4459..74f2ce802e6f 100644
--- a/drivers/iommu/io-pgtable-arm.c
+++ b/drivers/iommu/io-pgtable-arm.c
@@ -1016,7 +1016,7 @@ arm_mali_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie)
 {
 	struct io_pgtable *iop;
 
-	if (cfg->ias != 48 || cfg->oas > 40)
+	if (cfg->ias > 48 || cfg->oas > 40)
 		return NULL;
 
 	cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G);
-- 
2.17.1


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[PATCH v5 3/6] dt-bindings: gpu: add bus clock for Mali Midgard GPUs

[Clément Péron]

From: Icenowy Zheng <icenowy@aosc.io>

Some SoCs adds a bus clock gate to the Mali Midgard GPU.

Add the binding for the bus clock.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
index 1b1a74129141..2e8bbce35695 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
@@ -31,6 +31,12 @@ Optional properties:
 
 - clocks : Phandle to clock for the Mali Midgard device.
 
+- clock-names : Specify the names of the clocks specified in clocks
+  when multiple clocks are present.
+    * core: clock driving the GPU itself (When only one clock is present,
+      assume it's this clock.)
+    * bus: bus clock for the GPU
+
 - mali-supply : Phandle to regulator for the Mali device. Refer to
   Documentation/devicetree/bindings/regulator/regulator.txt for details.
 
-- 
2.17.1


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[PATCH v5 4/6] dt-bindings: gpu: mali-midgard: Add H6 mali gpu compatible

[Clément Péron]

This add the H6 mali compatible in the dt-bindings to later support
specific implementation.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/gpu/arm,mali-midgard.txt         | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
index 2e8bbce35695..4bf17e1cf555 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
@@ -15,6 +15,7 @@ Required properties:
     + "arm,mali-t860"
     + "arm,mali-t880"
   * which must be preceded by one of the following vendor specifics:
+    + "allwinner,sun50i-h6-mali"
     + "amlogic,meson-gxm-mali"
     + "rockchip,rk3288-mali"
     + "rockchip,rk3399-mali"
@@ -49,9 +50,15 @@ Vendor-specific bindings
 ------------------------
 
 The Mali GPU is integrated very differently from one SoC to
-another. In order to accomodate those differences, you have the option
+another. In order to accommodate those differences, you have the option
 to specify one more vendor-specific compatible, among:
 
+- "allwinner,sun50i-h6-mali"
+  Required properties:
+  - clocks : phandles to core and bus clocks
+  - clock-names : must contain "core" and "bus"
+  - resets: phandle to GPU reset line
+
 - "amlogic,meson-gxm-mali"
   Required properties:
   - resets : Should contain phandles of :
-- 
2.17.1


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[PATCH v5 5/6] arm64: dts: allwinner: Add ARM Mali GPU node for H6

[Clément Péron]

Add the mali gpu node to the H6 device-tree.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 16c5c3d0fd81..6aad06095c40 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -157,6 +157,20 @@
 			allwinner,sram = <&ve_sram 1>;
 		};
 
+		gpu: gpu@1800000 {
+			compatible = "allwinner,sun50i-h6-mali",
+				     "arm,mali-t720";
+			reg = <0x01800000 0x4000>;
+			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "job", "mmu", "gpu";
+			clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
+			clock-names = "core", "bus";
+			resets = <&ccu RST_BUS_GPU>;
+			status = "disabled";
+		};
+
 		syscon: syscon@3000000 {
 			compatible = "allwinner,sun50i-h6-system-control",
 				     "allwinner,sun50i-a64-system-control";
-- 
2.17.1


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[PATCH v5 6/6] arm64: dts: allwinner: Add mali GPU supply for H6 boards

[Clément Péron]

Enable and add supply to the Mali GPU node on all the
H6 boards.

Regarding the datasheet the maximum time for supply to reach
its voltage is 32ms.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 6 ++++++
 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts  | 6 ++++++
 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi   | 6 ++++++
 arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts    | 6 ++++++
 4 files changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index 0dc33c90dd60..fe36c6588d8e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
@@ -70,6 +70,11 @@
 	status = "okay";
 };
 
+&gpu {
+	mali-supply = <&reg_dcdcc>;
+	status = "okay";
+};
+
 &hdmi {
 	status = "okay";
 };
@@ -206,6 +211,7 @@
 			};
 
 			reg_dcdcc: dcdcc {
+				regulator-enable-ramp-delay = <32000>;
 				regulator-min-microvolt = <810000>;
 				regulator-max-microvolt = <1080000>;
 				regulator-name = "vdd-gpu";
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 17d496990108..ea4866b0fa7a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -58,6 +58,11 @@
 	status = "okay";
 };
 
+&gpu {
+	mali-supply = <&reg_dcdcc>;
+	status = "okay";
+};
+
 &mmc0 {
 	vmmc-supply = <&reg_cldo1>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
@@ -165,6 +170,7 @@
 			};
 
 			reg_dcdcc: dcdcc {
+				regulator-enable-ramp-delay = <32000>;
 				regulator-min-microvolt = <810000>;
 				regulator-max-microvolt = <1080000>;
 				regulator-name = "vdd-gpu";
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
index 62e27948a3fa..ec770f07aa82 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
@@ -55,6 +55,11 @@
 	status = "okay";
 };
 
+&gpu {
+	mali-supply = <&reg_dcdcc>;
+	status = "okay";
+};
+
 &mmc0 {
 	vmmc-supply = <&reg_cldo1>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
@@ -163,6 +168,7 @@
 			};
 
 			reg_dcdcc: dcdcc {
+				regulator-enable-ramp-delay = <32000>;
 				regulator-min-microvolt = <810000>;
 				regulator-max-microvolt = <1080000>;
 				regulator-name = "vdd-gpu";
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 4802902e128f..625a29a25c52 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -85,6 +85,11 @@
 	status = "okay";
 };
 
+&gpu {
+	mali-supply = <&reg_dcdcc>;
+	status = "okay";
+};
+
 &hdmi {
 	status = "okay";
 };
@@ -215,6 +220,7 @@
 			};
 
 			reg_dcdcc: dcdcc {
+				regulator-enable-ramp-delay = <32000>;
 				regulator-min-microvolt = <810000>;
 				regulator-max-microvolt = <1080000>;
 				regulator-name = "vdd-gpu";
-- 
2.17.1


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