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[209.85.219.180]) by smtp.gmail.com with ESMTPSA id 93-20020aed3166000000b00304df6f73f0sm18098217qtg.0.2022.07.03.01.33.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 03 Jul 2022 01:33:57 -0700 (PDT) Received: by mail-yb1-f180.google.com with SMTP id d145so8384907ybh.1; Sun, 03 Jul 2022 01:33:57 -0700 (PDT) X-Received: by 2002:a05:6902:120e:b0:634:6f29:6b84 with SMTP id s14-20020a056902120e00b006346f296b84mr8702569ybu.604.1656837236792; Sun, 03 Jul 2022 01:33:56 -0700 (PDT) MIME-Version: 1.0 References: <20190625075746.10439-1-vigneshr@ti.com> <20190625075746.10439-4-vigneshr@ti.com> <75fee78a-f411-1c7e-a902-d28d02703c16@ti.com> In-Reply-To: <75fee78a-f411-1c7e-a902-d28d02703c16@ti.com> From: Geert Uytterhoeven Date: Sun, 3 Jul 2022 10:33:45 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v8 3/5] mtd: Add support for HyperBus memory devices To: "Raghavendra, Vignesh" Cc: Boris Brezillon , Marek Vasut , Richard Weinberger , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Sergei Shtylyov , Tokunori Ikegami , Linux Kernel Mailing List , MTD Maling List , Miquel Raynal , Mason Yang , Linux ARM X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220703_013400_012870_37D2E033 X-CRM114-Status: GOOD ( 37.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Vignesh, On Sat, Jul 2, 2022 at 7:10 PM Raghavendra, Vignesh wrote: > On 6/27/2022 8:58 PM, Geert Uytterhoeven wrote: > > On Tue, Jun 25, 2019 at 10:00 AM Vignesh Raghavendra wrote: > >> Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate > >> Bus interface between a host system master and one or more slave > >> interfaces. HyperBus is used to connect microprocessor, microcontroller, > >> or ASIC devices with random access NOR flash memory (called HyperFlash) > >> or self refresh DRAM (called HyperRAM). > >> > >> Its a 8-bit data bus (DQ[7:0]) with Read-Write Data Strobe (RWDS) > >> signal and either Single-ended clock(3.0V parts) or Differential clock > >> (1.8V parts). It uses ChipSelect lines to select b/w multiple slaves. > >> At bus level, it follows a separate protocol described in HyperBus > >> specification[1]. > >> > >> HyperFlash follows CFI AMD/Fujitsu Extended Command Set (0x0002) similar > >> to that of existing parallel NORs. Since HyperBus is x8 DDR bus, > >> its equivalent to x16 parallel NOR flash with respect to bits per clock > >> cycle. But HyperBus operates at >166MHz frequencies. > >> HyperRAM provides direct random read/write access to flash memory > >> array. > >> > >> But, HyperBus memory controllers seem to abstract implementation details > >> and expose a simple MMIO interface to access connected flash. > >> > >> Add support for registering HyperFlash devices with MTD framework. MTD > >> maps framework along with CFI chip support framework are used to support > >> communicating with flash. > >> > >> Framework is modelled along the lines of spi-nor framework. HyperBus > >> memory controller (HBMC) drivers calls hyperbus_register_device() to > >> register a single HyperFlash device. HyperFlash core parses MMIO access > >> information from DT, sets up the map_info struct, probes CFI flash and > >> registers it with MTD framework. > >> > >> Some HBMC masters need calibration/training sequence[3] to be carried > >> out, in order for DLL inside the controller to lock, by reading a known > >> string/pattern. This is done by repeatedly reading CFI Query > >> Identification String. Calibration needs to be done before trying to detect > >> flash as part of CFI flash probe. > >> > >> HyperRAM is not supported at the moment. > > > > Thanks for your patch, which is now commit dcc7d3446a0fa19b ("mtd: > > Add support for HyperBus memory devices") in v5.3. > > > >> HyperBus specification can be found at[1] > >> HyperFlash datasheet can be found at[2] > >> > >> [1] https://www.cypress.com/file/213356/download > >> [2] https://www.cypress.com/file/213346/download > >> [3] http://www.ti.com/lit/ug/spruid7b/spruid7b.pdf > >> Table 12-5741. HyperFlash Access Sequence > > > > The last link no longer works. Do you have a replacement? > > Looks like I used a link point to specific version instead of top level > redirector link. Please use: > > https://www.ti.com/lit/pdf/spruid7 Thank you, that link works for me. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel