From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
Prabhakar <prabhakar.csengg@gmail.com>
Subject: Re: [PATCH v2 11/12] arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's
Date: Wed, 9 Jun 2021 09:01:21 +0200 [thread overview]
Message-ID: <CAMuHMdWCVsMOnURjS8BP9KW=nYW6q9hEfdb_x5_hLei=1DWp3g@mail.gmail.com> (raw)
In-Reply-To: <OS0PR01MB592232BFAF59D5C81CCBE6C7863B9@OS0PR01MB5922.jpnprd01.prod.outlook.com>
Hi Biju,
On Fri, Jun 4, 2021 at 3:55 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Subject: [PATCH v2 11/12] arm64: dts: renesas: Add initial DTSI for
> > RZ/G2{L,LC} SoC's
> >
> > Add initial DTSI for RZ/G2{L,LC} SoC's.
> >
> > File structure:
> > r9a07g044.dtsi => RZ/G2L family SoC common parts r9a07g044l1.dtsi =>
> > Specific to RZ/G2L (R9A07G044L single cortex A55) SoC
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> > + cpg: clock-controller@11010000 {
> > + compatible = "renesas,r9a07g044-cpg";
> > + reg = <0 0x11010000 0 0x10000>;
>
> What about WDTOVF_RST(0xB10) and WDTRST_SEL(0xB14) registers, this registers to be handled by WDT driver.
> Unfortunately it is in CPG block.
>
> So do we need to map the entire CPG registers or up to 0xB00?
>
> Geert, Prabhakar: Any thoughts?
As the registers are part of the CPG block, I think they should be
covered by the CPG node. You can handle them in the CPG driver, through
functions called from the WDT driver (cfr. rcar_rst_read_mode_pins()).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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next prev parent reply other threads:[~2021-06-09 7:03 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-03 22:17 [PATCH v2 00/12] Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support Lad Prabhakar
2021-06-03 22:17 ` [PATCH v2 01/12] dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC Lad Prabhakar
2021-06-08 15:23 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 02/12] dt-bindings: arm: renesas: Document Renesas RZ/G2{L, LC} SoC variants Lad Prabhakar
2021-06-08 15:23 ` [PATCH v2 02/12] dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} " Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 03/12] dt-bindings: arm: renesas: Document SMARC EVK Lad Prabhakar
2021-06-08 15:23 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 04/12] soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's Lad Prabhakar
2021-06-08 15:24 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 05/12] arm64: defconfig: Enable ARCH_R9A07G044 Lad Prabhakar
2021-06-08 15:24 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 06/12] clk: renesas: Define RZ/G2L CPG Clock Definitions Lad Prabhakar
2021-06-08 15:24 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 07/12] dt-bindings: clock: renesas: Document RZ/G2L SoC CPG driver Lad Prabhakar
2021-06-08 15:08 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 08/12] clk: renesas: Add CPG core wrapper for RZ/G2L SoC Lad Prabhakar
2021-06-03 22:17 ` [PATCH v2 09/12] clk: renesas: Add support for R9A07G044 SoC Lad Prabhakar
2021-06-03 22:17 ` [PATCH v2 10/12] serial: sh-sci: Add support for RZ/G2L SoC Lad Prabhakar
2021-06-08 15:03 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 11/12] arm64: dts: renesas: Add initial DTSI for RZ/G2{L, LC} SoC's Lad Prabhakar
2021-06-04 13:54 ` [PATCH v2 11/12] arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's Biju Das
2021-06-09 7:01 ` Geert Uytterhoeven [this message]
2021-06-09 7:08 ` Biju Das
2021-06-09 6:52 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 12/12] arm64: dts: renesas: Add initial device tree for RZ/G2L SMARC EVK Lad Prabhakar
2021-06-09 7:17 ` Geert Uytterhoeven
2021-06-09 7:55 ` Lad, Prabhakar
2021-06-07 11:00 ` [PATCH v2 00/12] Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support Lad, Prabhakar
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