From: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
To: David Lechner <david@lechnology.com>
Cc: devicetree@vger.kernel.org, linux-omap@vger.kernel.org,
jason@lakedaemon.net, "Bajjuri, Praneeth" <praneeth@ti.com>,
Marc Zyngier <maz@kernel.org>,
linux-kernel@vger.kernel.org, "Andrew F . Davis" <afd@ti.com>,
robh+dt@kernel.org, tglx@linutronix.de,
Lee Jones <lee.jones@linaro.org>,
"Mills, William" <wmills@ti.com>,
linux-arm-kernel@lists.infradead.org,
Roger Quadros <rogerq@ti.com>
Subject: Re: [PATCH v4 1/5] dt-bindings: irqchip: Add PRU-ICSS interrupt controller bindings
Date: Fri, 31 Jul 2020 16:16:27 +0200 [thread overview]
Message-ID: <CAMxfBF4jvWiT8CH+--OBxLiptiN42-WOMHAZhP7VM51GzgHWnA@mail.gmail.com> (raw)
In-Reply-To: <19fbf4f6-ea75-3eb7-7e95-c7c9ce987996@lechnology.com>
On Fri, 31 Jul 2020 at 16:09, David Lechner <david@lechnology.com> wrote:
>
> On 7/31/20 6:48 AM, Grzegorz Jaszczyk wrote:
> > On Wed, 29 Jul 2020 at 19:34, David Lechner <david@lechnology.com> wrote:
> >> It is not clear what the meaning of each cell is. Looking at later patches, it
> >> looks like the first cell is the PRU system event number, the second cell is the
> >> channel and the third cell is the host event number.
> >
> > Ok, how about updating above description like this:
> > Client users shall use the PRU System event number (the interrupt source
> > that the client is interested in) [cell 1], PRU channel [cell 2] and PRU
> > host_intr (target) [cell 3] as the value of the interrupts property in their
> > node. The system events can be mapped to some output host interrupts through 2
> > levels of many-to-one mapping i.e. events to channel mapping and channels to
> > host interrupts so through this property entire mapping is provided.
>
> Cell 3 is host_intr0-7? How would we map to other host events?
Again this is due to misleading TRM nomenclature: host_intr vs host
interrupts (one that we discuss in patch #2). I will use "and PRU host
event (target) [cell 3]...". Sorry for my mistake.
Thank you,
Grzegorz
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next prev parent reply other threads:[~2020-07-31 14:18 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-28 9:18 [PATCH v4 0/5] Add TI PRUSS Local Interrupt Controller IRQChip driver Grzegorz Jaszczyk
2020-07-28 9:18 ` [PATCH v4 1/5] dt-bindings: irqchip: Add PRU-ICSS interrupt controller bindings Grzegorz Jaszczyk
2020-07-29 17:34 ` David Lechner
2020-07-31 11:48 ` Grzegorz Jaszczyk
2020-07-31 14:09 ` David Lechner
2020-07-31 14:16 ` Grzegorz Jaszczyk [this message]
2020-07-31 14:35 ` Suman Anna
2020-07-31 21:09 ` Rob Herring
2020-08-02 21:49 ` Grzegorz Jaszczyk
2020-07-28 9:18 ` [PATCH v4 2/5] irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts Grzegorz Jaszczyk
2020-07-29 18:43 ` David Lechner
2020-07-31 11:57 ` Grzegorz Jaszczyk
2020-07-28 9:18 ` [PATCH v4 3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts Grzegorz Jaszczyk
2020-07-28 16:37 ` Marc Zyngier
2020-07-28 22:23 ` Grzegorz Jaszczyk
2020-07-29 18:48 ` David Lechner
2020-07-31 14:11 ` Grzegorz Jaszczyk
2020-07-28 9:18 ` [PATCH v4 4/5] irqchip/irq-pruss-intc: Implement irq_{get, set}_irqchip_state ops Grzegorz Jaszczyk
2020-07-29 19:23 ` [PATCH v4 4/5] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops David Lechner
2020-07-31 12:28 ` Grzegorz Jaszczyk
2020-07-31 15:59 ` David Lechner
2020-07-28 9:18 ` [PATCH v4 5/5] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs Grzegorz Jaszczyk
2020-07-29 19:28 ` David Lechner
2020-07-31 12:32 ` Grzegorz Jaszczyk
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