From: Anand Moon <linux.amoon@gmail.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <narmstrong@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-phy@lists.infradead.org,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-amlogic@lists.infradead.org,
Linux Kernel <linux-kernel@vger.kernel.org>
Subject: Re: [RFCv1 4/8] phy: amlogic: meson8b-usb2: Use phy set_mode callback function
Date: Mon, 21 Jun 2021 12:50:37 +0530 [thread overview]
Message-ID: <CANAwSgTd1zq_gHbVZesLY=e3DRRGgn_o5omuDo9Lub4FavOtbQ@mail.gmail.com> (raw)
In-Reply-To: <CAFBinCDpQybqD96CCMBDKYUXEYCABr0QMfxFH1AWrXP12UxxMg@mail.gmail.com>
Hi Martin,
On Sat, 19 Jun 2021 at 01:31, Martin Blumenstingl
<martin.blumenstingl@googlemail.com> wrote:
>
> Hi Anand,
>
> On Fri, Jun 18, 2021 at 3:19 PM Anand Moon <linux.amoon@gmail.com> wrote:
> [...]
> > > I suggest dropping this patch until we know for sure if and which
> > > registers need to be updated based on the DR mode.
> >
> > Yes, I have observed this, Can you give these small changes a try?
> > With the below changes, I got the PHY_MODE_USB_DEVICE support working.
> first of all: sorry that I have not linked my source of information previously:
> - Meson8b: [0]
> - Meson8 and Meson8m2: [1]
>
> Unfortunately I don't have any datasheet or "better documentation" of
> how the registers should be programmed.
> This is why I am a bit defensive when I am asked to change something
> there - as I simply have no way of knowing if the changes are good or
> not. I can only tell whether they're "identical" or "different" from
> what the vendor kernel does.
>
> [...]
> > + case PHY_MODE_USB_DEVICE:
> > + case PHY_MODE_USB_OTG:
> > + regmap_update_bits(priv->regmap, REG_ADP_BC,
> > + REG_ADP_BC_DCD_ENABLE,
> > + REG_ADP_BC_DCD_ENABLE);
> > +
> > + udelay(ACA_ENABLE_COMPLETE_TIME);
> > +
> > + regmap_read(priv->regmap, REG_ADP_BC, ®);
> > + if (reg & REG_ADP_BC_ACA_PIN_FLOAT) {
> > + dev_warn(&phy->dev, "USB ID detect failed!\n");
> > + return -EINVAL;
> > + }
> > + regmap_update_bits(priv->regmap, REG_ADP_BC,
> > + REG_ADP_BC_ID_PULLUP, REG_ADP_BC_ID_PULLUP);
> > + break;
> According to the vendor kernel this should only be applied to
> "host-only" USB_PORT_IDX_B (which is usb1 in the mainline .dtsi).
> Based on that I think it's not correct to apply this for DEVICE and OTG modes.
>
> The vendor kernel does not configure REG_ADP_BC_ID_PULLUP anywhere.
> Also DCD_ENABLE is only ever set to 0 (while you are enabling it now), see [2].
>
> As mentioned before: all I can say about this patch is that it
> programs the registers differently than the vendor kernel does.
> From your description I am not sure if you are now getting different
> behavior on Odroid-C1 with this patch (compared to what we had
> before).
>
In order to enable USB phy we probably need to do a little bit
differently than the vendor kernel.
Yes I have observed many configuration parameters are missing.
OTG port on Odroid C1+ and Odroid C2 server two purposes
1 > It could act as USB host port.
2 > It could be used as USB power on the devices, just like Raspberry pi.
What I meant is we need some driver code to protect the power to SbC.
So depending on the mode, it gets configured host mode or PCD mode,
I am not completely sure right now.
So I saw your work on extcon, that's the reason I would like to void
any changes PHY right now.
I observe some failures like below.
[ 6.013859] dwc2 c9000000.usb: DWC OTG HCD URB Dequeue
[ 6.013897] dwc2 c9000000.usb: Called usb_hcd_giveback_urb()
[ 6.013902] dwc2 c9000000.usb: urb->status = -115
Still investigating this issue,
>
> Best regards,
> Martin
>
Yes, I will go through the features for debugging in the future.
>
> [0] https://github.com/endlessm/linux-meson/blob/03393bb8e8478626e03ee93b0a2a225d6de242b5/arch/arm/mach-meson8b/usbclock.c#L120
> [1] https://github.com/endlessm/linux-meson/blob/03393bb8e8478626e03ee93b0a2a225d6de242b5/arch/arm/mach-meson8/usbclock.c#L120
> [2] https://github.com/endlessm/linux-meson/blob/d6e13c220931110fe676ede6da69fc61a7cb04b6/drivers/amlogic/usb/dwc_otg/310/dwc_otg_pcd.c#L71
Thanks
-Anand
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next prev parent reply other threads:[~2021-06-21 7:22 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-17 19:41 [RFCv1 0/8] Meson-8b and Meson-gxbb USB phy code re-structure Anand Moon
2021-06-17 19:41 ` [RFCv1 1/8] phy: amlogic: meson8b-usb2: Use clock bulk to get clocks for phy Anand Moon
2021-06-17 22:33 ` Martin Blumenstingl
2021-06-18 15:32 ` Anand Moon
2021-06-17 19:41 ` [RFCv1 2/8] phy: amlogic: meson8b-usb2: Use phy init callback function Anand Moon
2021-06-18 12:26 ` Martin Blumenstingl
2021-06-18 13:17 ` Anand Moon
2021-06-17 19:41 ` [RFCv1 3/8] phy: amlogic: meson8b-usb2: Use phy exit " Anand Moon
2021-06-17 19:41 ` [RFCv1 4/8] phy: amlogic: meson8b-usb2: Use phy set_mode " Anand Moon
2021-06-17 22:16 ` Martin Blumenstingl
2021-06-18 13:19 ` Anand Moon
2021-06-18 20:01 ` Martin Blumenstingl
2021-06-21 7:20 ` Anand Moon [this message]
2021-06-22 20:27 ` Martin Blumenstingl
2021-06-17 19:41 ` [RFCv1 5/8] phy: amlogic: meson8b-usb2: Reorder phy poweroff " Anand Moon
2021-06-17 22:16 ` Martin Blumenstingl
2021-06-18 15:33 ` Anand Moon
2021-06-17 19:41 ` [RFCv1 6/8] phy: amlogic: meson8b-usb2: Use phy reset " Anand Moon
2021-06-17 22:24 ` Martin Blumenstingl
2021-06-18 15:33 ` Anand Moon
2021-06-18 20:06 ` Martin Blumenstingl
2021-06-21 7:15 ` Anand Moon
2021-06-22 20:11 ` Martin Blumenstingl
2021-06-24 14:54 ` Anand Moon
2021-06-27 20:07 ` Anand Moon
2021-06-27 20:25 ` Martin Blumenstingl
2021-07-02 19:13 ` Anand Moon
2021-06-17 19:41 ` [RFCv1 7/8] phy: amlogic: meson8b-usb2: Power off the PHY by putting it into reset mode Anand Moon
2021-06-17 22:37 ` Martin Blumenstingl
2021-06-21 7:15 ` Anand Moon
2021-06-22 20:00 ` Martin Blumenstingl
2021-06-17 19:41 ` [RFCv1 8/8] phy: amlogic: meson8b-usb2: don't log an error on -EPROBE_DEFER Anand Moon
2021-06-17 22:26 ` Martin Blumenstingl
2021-06-17 22:11 ` [RFCv1 0/8] Meson-8b and Meson-gxbb USB phy code re-structure Martin Blumenstingl
2021-06-18 13:20 ` Anand Moon
2021-06-18 20:16 ` Martin Blumenstingl
2021-06-21 7:21 ` Anand Moon
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