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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=/iOG/8idvGV2NlEr48d1+co4D3okfF9K+FjhNANBHaU=; b=SljnK5WQWasSQfaetOxOFSRqUPkXgmIr6vRJ27Afh07lzyqIavZyu/wfmUM+pvwNnZ ASATfnTOXJ1rnUFKDE9MdLkfQjIoaJrLIACmNpAUW6dIbuhVKeGTrgKrPC45KLNAS+d3 Kv/RJVGWfqt5e8XXs6TG+n6BVQ6ifO+pgxAHExT8hk+BRjCr2Ebc9KrW0FfmEkwnimT+ Z6UoWrBKjdw7Pin4njsP4ZqWnje3J48kZhUToXKk0bE88oA3j7JXtj8esd4QhEX35GfS 0shBgwE3viAa7tBJuPXxowzSUHxFuv9W6zrXxz40l1WN6uBEjD0sG++aRcQuUnO4cvfw ydPA== X-Gm-Message-State: APjAAAVC9P7OwjtTGOLVQ32DGSIPY9fp6psypWZ8FEEBXOUUifY2RcFX 2svyztg9HGEToK+zu7Rc7ZogVpmeVNehKPMwolb5oA== X-Google-Smtp-Source: APXvYqxrvreJvJT5vGrBDNdDC5Sh1oJkWqcYopAwcjvFuFViXljI4yUgpB8+BoCFeuHES/RnGSXygSarGsdgXlviJ8Q= X-Received: by 2002:a6b:7d49:: with SMTP id d9mr487076ioq.50.1561492635672; Tue, 25 Jun 2019 12:57:15 -0700 (PDT) MIME-Version: 1.0 References: <20190618125433.9739-1-andrew.murray@arm.com> <20190618125433.9739-6-andrew.murray@arm.com> <20190618225549.GB24894@xps15> <494e131a-0fcf-a4b0-6112-cb5861756004@arm.com> In-Reply-To: <494e131a-0fcf-a4b0-6112-cb5861756004@arm.com> From: Mathieu Poirier Date: Tue, 25 Jun 2019 13:57:04 -0600 Message-ID: Subject: Re: [PATCH v1 5/5] coresight: etm4x: save/restore state across CPU low power states To: Suzuki K Poulose X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190625_125716_917642_4762CB32 X-CRM114-Status: GOOD ( 18.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexander Shishkin , Andrew Murray , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On Tue, 25 Jun 2019 at 04:07, Suzuki K Poulose wrote: > > Hi Mathieu, > > On 18/06/2019 23:55, Mathieu Poirier wrote: > > On Tue, Jun 18, 2019 at 01:54:33PM +0100, Andrew Murray wrote: > >> Some hardware will ignore bit TRCPDCR.PU which is used to signal > >> to hardware that power should not be removed from the trace unit. > >> Let's mitigate against this by saving and restoring the trace > >> unit state when the CPU enters low power states. > >> > >> To provide the benefit to both self-hosted and external debuggers > >> we save/restore the entire state which includes etmv4_config data > >> and dynamic data such as inflight counter values, sequencer > >> states, etc. > >> > >> To reduce CPU suspend/resume latency the state is only saved or > >> restored if coresight is in use as determined by the claimset > >> registers. > >> > >> To aid debug of CPU suspend/resume a disable_pm_save parameter > >> is provided to disable this feature. > >> > >> Signed-off-by: Andrew Murray > > > >> +static int etm4_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd, > >> + void *v) > >> +{ > >> + struct etmv4_drvdata *drvdata = container_of(nb, > >> + struct etmv4_drvdata, nb); > >> + > >> + if (disable_pm_save) > >> + return NOTIFY_OK; > >> + > >> + switch (cmd) { > >> + case CPU_PM_ENTER: > >> + /* save the state if coresight is in use */ > >> + if (coresight_is_claimed_any(drvdata->base)) > > > > claimed_any()? At this point if coresight_is_claimed_self_hosted() == false an > > external agent is competing with the framework and we should abdicate. > > I think claimed_any() is correct check. As per PSCI, ARM DEN 0022D, section > 6.8.1 Debug and Trace save and restore, the OS software is > in charge of save/restoring the context of Debug/Trace. The claim tags > are a mechanism to indicate who is consuming the components. Also, given > the OS software doesn't have a reliable way to communicate back to the > the External debugger about its decision to power down the CPU, that > makes sense to save/restore it. What I understand from section 6.8.1 is that supervisory and OS power management SW are responsible to save the debug context when operating in their respective mode, which reflects my comment above. I also see that two options are available to an external agent, i.e either use the DBGNOPWRDWN and DBGPWRUPREQ bits to request powerdown emulation or use the "OS Unlock Catch" debug event (which probably relates to the lost of context bit) to restore the debug context. >From where I stand there is no provision for OS power management code to take care of the debug context of an external agent. Am I missing something here? > > Cheers > Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel