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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=wKEiSm5kf8Odz4O9V4syYYT9QXFs1CapfQip+K78N1Q=; b=Sanje8uqwTjVO9gjHrFhKTeJFSwRrIEp2Q/vIuZwpskI1Mw/sKHqvIayREDpQH6SYU q2z/tcDR60U70j49k3mzE8+utLRALILaiGnY5Ec7nIiQINL0HmH278LxHb3zPr+aSt2O 8GpXV8eI+XBW3U8x2txW6wpZ+fCFvd+fLHuIvJ4C4kCRIx2hnNR/q6PLz/PuppY6KYoe 9Yp/YEIYP5mGcV1pF87Qg1PkKXtVyYTi5DKovI4obV1gufvY9oYnyCS1TPLQF+QaA540 e9/F4Wxz6aokudEdDsAJHcPuhPmNgTd9dgMV7mDuhbP64NAMgY9okB1voUL3GHZUBSsl fXfg== X-Gm-Message-State: APjAAAVlgyi1kLU35wnfVA3yLsvGcvSf6gNTlidZnpGLFPVzXgl0l/G0 +sfnGdqe2aN2PNmBsNDSNmkvaGFhn9NePhKIjjfU8w== X-Google-Smtp-Source: APXvYqz1KIa6msDQH9/EUGNRzs/VxrbR5gsZHhC/HB4q6k5M7vEahIK1t6Bzcy+BgoRBZDsMoygEHQdD7XiVP7sf82M= X-Received: by 2002:a6b:6b06:: with SMTP id g6mr3755891ioc.72.1570028650863; Wed, 02 Oct 2019 08:04:10 -0700 (PDT) MIME-Version: 1.0 References: <90114e06825e537c3aafd3de5c78743a9de6fadc.1564550873.git.saiprakash.ranjan@codeaurora.org> <16212a577339204e901cf4eefa5e82f1@codeaurora.org> <5b8835905a704fb813714694a792df54@codeaurora.org> In-Reply-To: <5b8835905a704fb813714694a792df54@codeaurora.org> From: Mathieu Poirier Date: Wed, 2 Oct 2019 09:03:59 -0600 Message-ID: Subject: Re: [PATCHv9 2/3] arm64: dts: qcom: msm8998: Add Coresight support To: Sai Prakash Ranjan X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191002_080413_683869_25AFA6A7 X-CRM114-Status: GOOD ( 15.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rajendra Nayak , Suzuki K Poulose , Alexander Shishkin , MSM , Jeffrey Hugo , lkml , Bjorn Andersson , David Brown , Andy Gross , Sibi Sankar , Marc Gonzalez , Leo Yan , linux-arm-msm-owner@vger.kernel.org, linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 1 Oct 2019 at 12:05, Sai Prakash Ranjan wrote: > > On 2019-10-01 11:01, Jeffrey Hugo wrote: > > On Tue, Oct 1, 2019 at 11:52 AM Sai Prakash Ranjan > > wrote: > >> > >> > >> Haan then likely it's the firmware issue. > >> We should probably disable coresight in soc dtsi and enable only for > >> MTP. For now you can add a status=disabled for all coresight nodes in > >> msm8998.dtsi and I will send the patch doing the same in a day or > >> two(sorry I am travelling currently). > > > > This sounds sane to me (and is what I did while bisecting the issue). > > When you do create the patch, feel free to add the following tags as > > you see fit. > > > > Reported-by: Jeffrey Hugo > > Tested-by: Jeffrey Hugo > > Thanks Jeffrey, I will add them. > Hope Mathieu and Suzuki are OK with this. The problem here is that a debug and production device are using the same device tree, i.e msm8998.dtsi. Disabling coresight devices in the DTS file will allow the laptop to boot but completely disabled coresight blocks on the MTP board. Leaving things as is breaks the laptop but allows coresight to be used on the MTP board. One of three things can happen: 1) Nothing gets done and production board can't boot without DTS modifications. 2) Disable tags are added to the DTS file and the debug board can't use coresight without modifications. 2) The handling of the debug power domain is done properly on the MSM8998 rather than relying on the bootloader to enable it. 3) The DTS file is split or reorganised to account for debug/production devices. Which of the above ends up being the final solution is entirely up to David and Andy. Regards, Mathieu > > Thanks, > Sai _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel