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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=29F319nrIBHttIGsOBAGjLt8RaL0BtnN8/ZcPROrQ7A=; b=NTgVPSjw2k6hnq7VLPKYhzmvQ/ppXKFweaijgWP0qrm8tHMkzblR2hGwsgnOt/WfKu SMQ48LS/X7rIWtD2dbxa8um6ht9ibuHtBt8aLc6BdNoDVFlYpnyVDt/jQZerIjSPBuIR GwnyR6yn0947FZS0xuLo64EiL7zF0mCCReBcEv3X4Zu9AkE4GmeBhtKgRzA6VOVI2HDG 8e3tIEUDl7JHpklrKt3hffxsmdwe3ujX2gvPpBk5ojG/gllICaBVHo2j6gaOqic47Lah 81Zn/UO6vGTU77X/Er9E6vWj5kOTtXQu7sqVk642TfhsJp3rzX4GWD012l6ZvwIF7eL2 MjgA== X-Gm-Message-State: AOAM531N2C1QijYU6MO4zPwrT8n3Y+htU4UWpHTSYPwkBPC2RYz+cV6k 8p5GewvOaYPHFUhn4HLRdnR+cH9bPOQmgxVTidXdOkud X-Google-Smtp-Source: ABdhPJxIzmUWrDyxO5bXmP/f7wDlvof2nYE+fSuYzsvlGhQh2zKbffa5E4RZxH5geb32WbV3b15DyAEXTQXbAHvsHAI= X-Received: by 2002:a92:a197:: with SMTP id b23mr30126457ill.58.1594054288334; Mon, 06 Jul 2020 09:51:28 -0700 (PDT) MIME-Version: 1.0 References: <20200701231701.91029-1-suzuki.poulose@arm.com> In-Reply-To: <20200701231701.91029-1-suzuki.poulose@arm.com> From: Mathieu Poirier Date: Mon, 6 Jul 2020 10:51:17 -0600 Message-ID: Subject: Re: [PATCH] coresight: etm4x: Fix save/restore during cpu idle To: Suzuki K Poulose X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200706_125130_915762_EF75C697 X-CRM114-Status: GOOD ( 16.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Coresight ML , "# 4 . 7" , linux-arm-kernel , Mike Leach Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 1 Jul 2020 at 17:17, Suzuki K Poulose wrote: > > The ETM state save/restore incorrectly reads/writes some of the 64bit > registers (e.g, address comparators, vmid/cid comparators etc.) using > 32bit accesses. Ensure we use the appropriate width accessors for > the registers. > > Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states") > Cc: Mathieu Poirier > Cc: Mike Leach > Signed-off-by: Suzuki K Poulose > --- > drivers/hwtracing/coresight/coresight-etm4x.c | 16 ++++++++-------- > drivers/hwtracing/coresight/coresight-etm4x.h | 2 +- > 2 files changed, 9 insertions(+), 9 deletions(-) Applied - thanks. Mathieu > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c > index 82fc2fab072a..be990457a8ea 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x.c > @@ -1206,8 +1206,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) > } > > for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) { > - state->trcacvr[i] = readl(drvdata->base + TRCACVRn(i)); > - state->trcacatr[i] = readl(drvdata->base + TRCACATRn(i)); > + state->trcacvr[i] = readq(drvdata->base + TRCACVRn(i)); > + state->trcacatr[i] = readq(drvdata->base + TRCACATRn(i)); > } > > /* > @@ -1218,10 +1218,10 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) > */ > > for (i = 0; i < drvdata->numcidc; i++) > - state->trccidcvr[i] = readl(drvdata->base + TRCCIDCVRn(i)); > + state->trccidcvr[i] = readq(drvdata->base + TRCCIDCVRn(i)); > > for (i = 0; i < drvdata->numvmidc; i++) > - state->trcvmidcvr[i] = readl(drvdata->base + TRCVMIDCVRn(i)); > + state->trcvmidcvr[i] = readq(drvdata->base + TRCVMIDCVRn(i)); > > state->trccidcctlr0 = readl(drvdata->base + TRCCIDCCTLR0); > state->trccidcctlr1 = readl(drvdata->base + TRCCIDCCTLR1); > @@ -1319,18 +1319,18 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) > } > > for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) { > - writel_relaxed(state->trcacvr[i], > + writeq_relaxed(state->trcacvr[i], > drvdata->base + TRCACVRn(i)); > - writel_relaxed(state->trcacatr[i], > + writeq_relaxed(state->trcacatr[i], > drvdata->base + TRCACATRn(i)); > } > > for (i = 0; i < drvdata->numcidc; i++) > - writel_relaxed(state->trccidcvr[i], > + writeq_relaxed(state->trccidcvr[i], > drvdata->base + TRCCIDCVRn(i)); > > for (i = 0; i < drvdata->numvmidc; i++) > - writel_relaxed(state->trcvmidcvr[i], > + writeq_relaxed(state->trcvmidcvr[i], > drvdata->base + TRCVMIDCVRn(i)); > > writel_relaxed(state->trccidcctlr0, drvdata->base + TRCCIDCCTLR0); > diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h > index 7da022e87218..b8283e1d6d88 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x.h > +++ b/drivers/hwtracing/coresight/coresight-etm4x.h > @@ -334,7 +334,7 @@ struct etmv4_save_state { > u64 trcacvr[ETM_MAX_SINGLE_ADDR_CMP]; > u64 trcacatr[ETM_MAX_SINGLE_ADDR_CMP]; > u64 trccidcvr[ETMv4_MAX_CTXID_CMP]; > - u32 trcvmidcvr[ETM_MAX_VMID_CMP]; > + u64 trcvmidcvr[ETM_MAX_VMID_CMP]; > u32 trccidcctlr0; > u32 trccidcctlr1; > u32 trcvmidcctlr0; > -- > 2.24.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel