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h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=7bk9PKS0LUF/VXYjndR8WWxMJuOaeyMXD3n2lNQIHcU=; b=hi8tizbJF/0SamQg1tppHHXj7TI0eq1pNCUcRguFWGHMzED5K/xl9tDnwONHW2B+Mr zH87aN18h23M5pQqf0xSPUZ0iA1X6klNjanB+xPCI5+yNNvQR0OiPwdMI9000iSj41eh hZtr8bxmZUkQnfHmQOzWLqxOEal6qGG/pvZ89kad1OurTAeEHBhw3HTRXi0LxHFN3nmx 3Jw43NwHpxVj9hV6iYuh7C3/8qrKhBt+fsW4Hhe/C7YTXwEsVay4tarDob/ZJSfrUfaO c9KlLa6txA38ohd9UrRpxisomq9BI3SA8gp7kEa67EgIhlkwU7nnXNTucpHi9PfpN7Bz C1dg== X-Gm-Message-State: APjAAAUKLzsh9LYA/GGgtBuG7j9brQyrw6cztZZrPiEMPEjvEi36QzOf tsxZX6g1mHl6MZmmjOeaCZm/ONSryq3xlECiZv6d/A== X-Google-Smtp-Source: APXvYqz6Z/DGEGsEyaa9qGn+2yYqelpKYUGdH1lxYhnbq3lvI7+b9MoUcvdxPgfBnolddNg3F1SCS2bCZU7/iYJ6Ti8= X-Received: by 2002:aed:35f7:: with SMTP id d52mr47105986qte.335.1553990831296; Sat, 30 Mar 2019 17:07:11 -0700 (PDT) MIME-Version: 1.0 References: <1553841972-19737-1-git-send-email-andrew-sh.cheng@mediatek.com> <1553841972-19737-2-git-send-email-andrew-sh.cheng@mediatek.com> In-Reply-To: <1553841972-19737-2-git-send-email-andrew-sh.cheng@mediatek.com> From: Nicolas Boichat Date: Sat, 30 Mar 2019 17:06:58 -0700 Message-ID: Subject: Re: [PATCH v2 1/4] cpufreq: mediatek: add mt8183 cpufreq support To: "Andrew-sh.Cheng" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190330_170714_418117_33DFD061 X-CRM114-Status: GOOD ( 22.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, srv_heupstream , linux-pm@vger.kernel.org, Viresh Kumar , "Rafael J. Wysocki" , lkml , Rob Herring , Chanwoo Choi , Kyungmin Park , MyungJoo Ham , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Fan Chen , linux-arm Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Mar 28, 2019 at 11:46 PM Andrew-sh.Cheng wrote: > > For new mediatek chip mt8183, > cci and little cluster share the same buck, > so need to modify the attribute of regulator from exclusive to optional > > Intermediate clock is not always enabled by ccf in different projects, > so cpufreq should always enable it by itself. One comment, otherwise the changes look good. However, I feel that this patch should be split in 3: 1. Change to regulator_get_optional 2. Enable inter_clk 3. Add support for 8183 > Signed-off-by: Andrew-sh.Cheng > --- > drivers/cpufreq/cpufreq-dt-platdev.c | 1 + > drivers/cpufreq/mediatek-cpufreq.c | 12 ++++++++++-- > 2 files changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c > index 47729a2..53ea52b 100644 > --- a/drivers/cpufreq/cpufreq-dt-platdev.c > +++ b/drivers/cpufreq/cpufreq-dt-platdev.c > @@ -117,6 +117,7 @@ > { .compatible = "mediatek,mt817x", }, > { .compatible = "mediatek,mt8173", }, > { .compatible = "mediatek,mt8176", }, > + { .compatible = "mediatek,mt8183", }, > > { .compatible = "nvidia,tegra124", }, > { .compatible = "nvidia,tegra210", }, > diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c > index 48e9829..7cd01d3 100644 > --- a/drivers/cpufreq/mediatek-cpufreq.c > +++ b/drivers/cpufreq/mediatek-cpufreq.c > @@ -346,7 +346,7 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) > goto out_free_resources; > } > > - proc_reg = regulator_get_exclusive(cpu_dev, "proc"); > + proc_reg = regulator_get_optional(cpu_dev, "proc"); > if (IS_ERR(proc_reg)) { > if (PTR_ERR(proc_reg) == -EPROBE_DEFER) > pr_warn("proc regulator for cpu%d not ready, retry.\n", > @@ -376,13 +376,17 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) > goto out_free_resources; > } > > + ret = clk_prepare_enable(inter_clk); Should you disable the clock in mtk_cpu_dvfs_info_release? > + if (ret) > + goto out_free_opp_table; > + > /* Search a safe voltage for intermediate frequency. */ > rate = clk_get_rate(inter_clk); > opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate); > if (IS_ERR(opp)) { > pr_err("failed to get intermediate opp for cpu%d\n", cpu); > ret = PTR_ERR(opp); > - goto out_free_opp_table; > + goto out_disable_clock; > } > info->intermediate_voltage = dev_pm_opp_get_voltage(opp); > dev_pm_opp_put(opp); > @@ -401,6 +405,9 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) > > return 0; > > +out_disable_clock: > + clk_disable_unprepare(inter_clk); > + > out_free_opp_table: > dev_pm_opp_of_cpumask_remove_table(&info->cpus); > > @@ -543,6 +550,7 @@ static int mtk_cpufreq_probe(struct platform_device *pdev) > { .compatible = "mediatek,mt817x", }, > { .compatible = "mediatek,mt8173", }, > { .compatible = "mediatek,mt8176", }, > + { .compatible = "mediatek,mt8183", }, > > { } > }; > -- > 1.8.1.1.dirty > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel