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* [PATCH 1/1] ARM: dts: imx6ul: fix PWM[1-4] interrupts
@ 2019-06-18 15:58 Sébastien Szymanski
  2019-06-18 16:43 ` Fabio Estevam
  2019-06-24  0:47 ` Shawn Guo
  0 siblings, 2 replies; 5+ messages in thread
From: Sébastien Szymanski @ 2019-06-18 15:58 UTC (permalink / raw)
  To: linux-arm-kernel, devicetree, NXP Linux Team, Sascha Hauer, Shawn Guo
  Cc: Mark Rutland, Rob Herring, Fabio Estevam, Pengutronix Kernel Team

According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt
summary", the interrupts for the PWM[1-4] go from 83 to 86.

Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes")
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
---
 arch/arm/boot/dts/imx6ul.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index bbf010c73336..a7f6d1d58e20 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -358,7 +358,7 @@
 			pwm1: pwm@2080000 {
 				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
 				reg = <0x02080000 0x4000>;
-				interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+				interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clks IMX6UL_CLK_PWM1>,
 					 <&clks IMX6UL_CLK_PWM1>;
 				clock-names = "ipg", "per";
@@ -369,7 +369,7 @@
 			pwm2: pwm@2084000 {
 				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
 				reg = <0x02084000 0x4000>;
-				interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+				interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clks IMX6UL_CLK_PWM2>,
 					 <&clks IMX6UL_CLK_PWM2>;
 				clock-names = "ipg", "per";
@@ -380,7 +380,7 @@
 			pwm3: pwm@2088000 {
 				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
 				reg = <0x02088000 0x4000>;
-				interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+				interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clks IMX6UL_CLK_PWM3>,
 					 <&clks IMX6UL_CLK_PWM3>;
 				clock-names = "ipg", "per";
@@ -391,7 +391,7 @@
 			pwm4: pwm@208c000 {
 				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
 				reg = <0x0208c000 0x4000>;
-				interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+				interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clks IMX6UL_CLK_PWM4>,
 					 <&clks IMX6UL_CLK_PWM4>;
 				clock-names = "ipg", "per";
-- 
2.21.0


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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/1] ARM: dts: imx6ul: fix PWM[1-4] interrupts
  2019-06-18 15:58 [PATCH 1/1] ARM: dts: imx6ul: fix PWM[1-4] interrupts Sébastien Szymanski
@ 2019-06-18 16:43 ` Fabio Estevam
  2019-06-24  0:47 ` Shawn Guo
  1 sibling, 0 replies; 5+ messages in thread
From: Fabio Estevam @ 2019-06-18 16:43 UTC (permalink / raw)
  To: Sébastien Szymanski
  Cc: Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Sascha Hauer, Rob Herring, NXP Linux Team,
	Pengutronix Kernel Team, Shawn Guo,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE

Hi Sébastien,

On Tue, Jun 18, 2019 at 12:58 PM Sébastien Szymanski
<sebastien.szymanski@armadeus.com> wrote:
>
> According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt
> summary", the interrupts for the PWM[1-4] go from 83 to 86.
>
> Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes")
> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>

Good catch:

Reviewed-by: Fabio Estevam <festevam@gmail.com>

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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/1] ARM: dts: imx6ul: fix PWM[1-4] interrupts
  2019-06-18 15:58 [PATCH 1/1] ARM: dts: imx6ul: fix PWM[1-4] interrupts Sébastien Szymanski
  2019-06-18 16:43 ` Fabio Estevam
@ 2019-06-24  0:47 ` Shawn Guo
  2019-06-24  7:36   ` Sébastien Szymanski
  1 sibling, 1 reply; 5+ messages in thread
From: Shawn Guo @ 2019-06-24  0:47 UTC (permalink / raw)
  To: Sébastien Szymanski, Lothar Waßmann
  Cc: Mark Rutland, devicetree, Sascha Hauer, Rob Herring,
	NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam,
	linux-arm-kernel

+Lothar

On Tue, Jun 18, 2019 at 05:58:34PM +0200, Sébastien Szymanski wrote:
> According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt
> summary", the interrupts for the PWM[1-4] go from 83 to 86.
> 
> Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes")
> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>

Just curious - did you spot the error by testing PWM or merely by
looking at the code and document?

Shawn

> ---
>  arch/arm/boot/dts/imx6ul.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index bbf010c73336..a7f6d1d58e20 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -358,7 +358,7 @@
>  			pwm1: pwm@2080000 {
>  				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
>  				reg = <0x02080000 0x4000>;
> -				interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
> +				interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&clks IMX6UL_CLK_PWM1>,
>  					 <&clks IMX6UL_CLK_PWM1>;
>  				clock-names = "ipg", "per";
> @@ -369,7 +369,7 @@
>  			pwm2: pwm@2084000 {
>  				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
>  				reg = <0x02084000 0x4000>;
> -				interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> +				interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&clks IMX6UL_CLK_PWM2>,
>  					 <&clks IMX6UL_CLK_PWM2>;
>  				clock-names = "ipg", "per";
> @@ -380,7 +380,7 @@
>  			pwm3: pwm@2088000 {
>  				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
>  				reg = <0x02088000 0x4000>;
> -				interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
> +				interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&clks IMX6UL_CLK_PWM3>,
>  					 <&clks IMX6UL_CLK_PWM3>;
>  				clock-names = "ipg", "per";
> @@ -391,7 +391,7 @@
>  			pwm4: pwm@208c000 {
>  				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
>  				reg = <0x0208c000 0x4000>;
> -				interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> +				interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&clks IMX6UL_CLK_PWM4>,
>  					 <&clks IMX6UL_CLK_PWM4>;
>  				clock-names = "ipg", "per";
> -- 
> 2.21.0
> 

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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/1] ARM: dts: imx6ul: fix PWM[1-4] interrupts
  2019-06-24  0:47 ` Shawn Guo
@ 2019-06-24  7:36   ` Sébastien Szymanski
  2019-06-24 13:14     ` Shawn Guo
  0 siblings, 1 reply; 5+ messages in thread
From: Sébastien Szymanski @ 2019-06-24  7:36 UTC (permalink / raw)
  To: Shawn Guo, Lothar Waßmann
  Cc: Mark Rutland, devicetree, Sascha Hauer, Rob Herring,
	NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam,
	linux-arm-kernel

Hello,

On 6/24/19 2:47 AM, Shawn Guo wrote:
> +Lothar
> 
> On Tue, Jun 18, 2019 at 05:58:34PM +0200, Sébastien Szymanski wrote:
>> According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt
>> summary", the interrupts for the PWM[1-4] go from 83 to 86.
>>
>> Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes")
>> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
> 
> Just curious - did you spot the error by testing PWM or merely by
> looking at the code and document?

I spotted the error when trying to play sound with PWM [1].
The PWM driver (drivers/pwm/pwm-imx27.c) don't use interrupt that's
probably why nobody notice this error.

[1] https://github.com/sasamy/imx-snd-pwm

Regards,

> 
> Shawn
> 
>> ---
>>  arch/arm/boot/dts/imx6ul.dtsi | 8 ++++----
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
>> index bbf010c73336..a7f6d1d58e20 100644
>> --- a/arch/arm/boot/dts/imx6ul.dtsi
>> +++ b/arch/arm/boot/dts/imx6ul.dtsi
>> @@ -358,7 +358,7 @@
>>  			pwm1: pwm@2080000 {
>>  				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
>>  				reg = <0x02080000 0x4000>;
>> -				interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
>> +				interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
>>  				clocks = <&clks IMX6UL_CLK_PWM1>,
>>  					 <&clks IMX6UL_CLK_PWM1>;
>>  				clock-names = "ipg", "per";
>> @@ -369,7 +369,7 @@
>>  			pwm2: pwm@2084000 {
>>  				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
>>  				reg = <0x02084000 0x4000>;
>> -				interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
>> +				interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
>>  				clocks = <&clks IMX6UL_CLK_PWM2>,
>>  					 <&clks IMX6UL_CLK_PWM2>;
>>  				clock-names = "ipg", "per";
>> @@ -380,7 +380,7 @@
>>  			pwm3: pwm@2088000 {
>>  				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
>>  				reg = <0x02088000 0x4000>;
>> -				interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
>> +				interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
>>  				clocks = <&clks IMX6UL_CLK_PWM3>,
>>  					 <&clks IMX6UL_CLK_PWM3>;
>>  				clock-names = "ipg", "per";
>> @@ -391,7 +391,7 @@
>>  			pwm4: pwm@208c000 {
>>  				compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
>>  				reg = <0x0208c000 0x4000>;
>> -				interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
>> +				interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
>>  				clocks = <&clks IMX6UL_CLK_PWM4>,
>>  					 <&clks IMX6UL_CLK_PWM4>;
>>  				clock-names = "ipg", "per";
>> -- 
>> 2.21.0
>>


-- 
Sébastien Szymanski
Software engineer, Armadeus Systems
Tel: +33 (0)9 72 29 41 44
Fax: +33 (0)9 72 28 79 26

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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/1] ARM: dts: imx6ul: fix PWM[1-4] interrupts
  2019-06-24  7:36   ` Sébastien Szymanski
@ 2019-06-24 13:14     ` Shawn Guo
  0 siblings, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2019-06-24 13:14 UTC (permalink / raw)
  To: Sébastien Szymanski
  Cc: Mark Rutland, devicetree, Sascha Hauer, Rob Herring,
	NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam,
	linux-arm-kernel, Lothar Waßmann

On Mon, Jun 24, 2019 at 09:36:37AM +0200, Sébastien Szymanski wrote:
> Hello,
> 
> On 6/24/19 2:47 AM, Shawn Guo wrote:
> > +Lothar
> > 
> > On Tue, Jun 18, 2019 at 05:58:34PM +0200, Sébastien Szymanski wrote:
> >> According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt
> >> summary", the interrupts for the PWM[1-4] go from 83 to 86.
> >>
> >> Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes")
> >> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
> > 
> > Just curious - did you spot the error by testing PWM or merely by
> > looking at the code and document?
> 
> I spotted the error when trying to play sound with PWM [1].
> The PWM driver (drivers/pwm/pwm-imx27.c) don't use interrupt that's
> probably why nobody notice this error.

Thanks for the info.  Patch applied, thanks.

Shawn

> 
> [1] https://github.com/sasamy/imx-snd-pwm

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linux-arm-kernel@lists.infradead.org
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^ permalink raw reply	[flat|nested] 5+ messages in thread

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Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-18 15:58 [PATCH 1/1] ARM: dts: imx6ul: fix PWM[1-4] interrupts Sébastien Szymanski
2019-06-18 16:43 ` Fabio Estevam
2019-06-24  0:47 ` Shawn Guo
2019-06-24  7:36   ` Sébastien Szymanski
2019-06-24 13:14     ` Shawn Guo

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