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[209.85.210.43]) by smtp.gmail.com with ESMTPSA id 17sm6129830oty.48.2020.01.14.19.47.43 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 14 Jan 2020 19:47:44 -0800 (PST) Received: by mail-ot1-f43.google.com with SMTP id a15so14908484otf.1 for ; Tue, 14 Jan 2020 19:47:43 -0800 (PST) X-Received: by 2002:a05:6830:13da:: with SMTP id e26mr1239454otq.97.1579060063207; Tue, 14 Jan 2020 19:47:43 -0800 (PST) MIME-Version: 1.0 References: <20200114033226.16786-1-gtk_ruiwang@mediatek.com> In-Reply-To: <20200114033226.16786-1-gtk_ruiwang@mediatek.com> From: Alexandre Courbot Date: Wed, 15 Jan 2020 12:47:32 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: media: mtk-vcodec: reset segment data then trig decoder To: gtk_ruiwang X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200114_194748_593205_52972F93 X-CRM114-Status: GOOD ( 22.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tiffany Lin , srv_heupstream@mediatek.com, Yunfei Dong , Longfei Wang , LKML , Tomasz Figa , Hans Verkuil , Maoguang Meng , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Thomas Gleixner , Mauro Carvalho Chehab , "moderated list:ARM/Mediatek SoC support" , Linux Media Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jan 14, 2020 at 12:32 PM wrote: > > From: gtk_ruiwang > > VP9 bitstream specification indicate segment data should reset to > default when meet key frames, intra only frames or enable error > resilience mode. So memset segmentation map buffer before every > decode process is not appropriate. > > Reset segment data only when needed, then trig decoder hardware > > Signed-off-by: Rui Wang > --- > .../platform/mtk-vcodec/vdec/vdec_vp9_if.c | 19 +++++++++++++++---- > 1 file changed, 15 insertions(+), 4 deletions(-) > > diff --git a/drivers/media/platform/mtk-vcodec/vdec/vdec_vp9_if.c b/drivers/media/platform/mtk-vcodec/vdec/vdec_vp9_if.c > index 24c1f0bf2147..42c9c3c98076 100644 > --- a/drivers/media/platform/mtk-vcodec/vdec/vdec_vp9_if.c > +++ b/drivers/media/platform/mtk-vcodec/vdec/vdec_vp9_if.c > @@ -110,7 +110,9 @@ struct vp9_sf_ref_fb { > * @buf_len_sz_c : size used to store cbcr plane ufo info (AP-R, VPU-W) > > * @profile : profile sparsed from vpu (AP-R, VPU-W) > - * @show_frame : display this frame or not (AP-R, VPU-W) > + * @show_frame : [BIT(0)] display this frame or not (AP-R, VPU-W) > + * [BIT(14)] reset segment data or not (AP-R, VPU-W) > + * [BIT(15)] trig decoder hardware or not (AP-R, VPU-W) > * @show_existing_frame : inform this frame is show existing frame > * (AP-R, VPU-W) > * @frm_to_show_idx : index to show frame (AP-R, VPU-W) > @@ -494,12 +496,12 @@ static void vp9_swap_frm_bufs(struct vdec_vp9_inst *inst) > frm_to_show->fb->base_y.size); > } > if (!vp9_is_sf_ref_fb(inst, inst->cur_fb)) { > - if (vsi->show_frame) > + if (vsi->show_frame & BIT(0)) > vp9_add_to_fb_disp_list(inst, inst->cur_fb); > } > } else { > if (!vp9_is_sf_ref_fb(inst, inst->cur_fb)) { > - if (vsi->show_frame) > + if (vsi->show_frame & BIT(0)) > vp9_add_to_fb_disp_list(inst, frm_to_show->fb); > } > } > @@ -870,13 +872,22 @@ static int vdec_vp9_decode(void *h_vdec, struct mtk_vcodec_mem *bs, > vsi->sf_frm_sz[idx]); > } > } > - memset(inst->seg_id_buf.va, 0, inst->seg_id_buf.size); > ret = vpu_dec_start(&inst->vpu, data, 3); > if (ret) { > mtk_vcodec_err(inst, "vpu_dec_start failed"); > goto DECODE_ERROR; > } > > + if ((vsi->show_frame & BIT(15)) && > + (vsi->show_frame & BIT(14))) { Using the new bits in this manner means this patch is not compatible with the older firmware. On an older firmware, these bits will be 0, which means the decoder will never be started. To preserve compatibility, the behavior should be reversed: *do not* reset and/or start the decoder if the bits are set. Also both bits are only used together - we should either separate the data segment reset and decoder start, or rely on only one bit for this. > + memset(inst->seg_id_buf.va, 0, inst->seg_id_buf.size); > + ret = vpu_dec_start(&inst->vpu, NULL, 0); > + if (ret) { > + mtk_vcodec_err(inst, "vpu trig decoder failed"); > + goto DECODE_ERROR; > + } > + } > + > ret = validate_vsi_array_indexes(inst, vsi); > if (ret) { > mtk_vcodec_err(inst, "Invalid values from VPU."); > -- > 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel