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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=GOyJCplE0htCyKO+7S6/vnX0Dv0M9OHzxvwXwcOQOP4=; b=BLfhyfU4OHd3+iaktifO3k2ks/KmE28pAWQvBZ55W3OssSfLZIYeuSkY/EOPZRgAIC XDq4C0llSzWJ2UsvwK1l5wSKGyUALdXsWMXVAs1LWqo7ik0tJetTHRa/0kT9C/JaR354 DWnsTE4qOg5aZQp7i5GXGgB1HBRqlI9MB3n1F6Tgui1feznhCg2Nfq46pqElt7JWAkAl NB5wd8dIFhFkM7Q49Mfq9wkGxdZMRhitP1O7aELJ5MRbo2g7K98a7g5GfbrnfIdyfrfn G5xOFlF2tZYJCIoIr9wogqibr6JUqqvqO3Id+ADK7uHffiMbgQFqgAV9hhaJtXsRMLBU OqtA== X-Gm-Message-State: AGi0PuYwitND6QF+VpBqL+kye79UxPYXrVnm9+mpzAbzCCSN/gPbFxxb nm9zP3hQI1cbaM3W7RUix7r//zeSwgfFpW6VHB704A== X-Google-Smtp-Source: APiQypIV3sbG4ZSLW2R9RC7kszUeNGv4pTkPCpr++SJIgTpFreELrbQMO3vTo+toXhRCi6FYQeprQHSzN9Qws1pY5HQ= X-Received: by 2002:ab0:5ca:: with SMTP id e68mr505205uae.19.1588914365738; Thu, 07 May 2020 22:06:05 -0700 (PDT) MIME-Version: 1.0 References: <1588031768-23677-1-git-send-email-chun-hung.wu@mediatek.com> <1588031768-23677-2-git-send-email-chun-hung.wu@mediatek.com> <9bc2454f-0b42-e256-7927-2564b56f369f@codeaurora.org> In-Reply-To: From: Ulf Hansson Date: Fri, 8 May 2020 07:05:29 +0200 Message-ID: Subject: Re: [PATCH v5 1/5] mmc: core: Extend mmc_of_parse() to parse CQE bindings To: Veerabhadrarao Badiganti , Chun-Hung Wu X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200507_220607_368795_FB51CFED X-CRM114-Status: GOOD ( 25.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Kate Stewart , wsd_upstream@mediatek.com, "linux-mmc@vger.kernel.org" , Linus Walleij , Al Cooper , Bjorn Andersson , linux-tegra , Thierry Reding , Pavel Machek , Florian Fainelli , Michal Simek , Jonathan Hunter , Andy Gross , BCM Kernel Feedback , Chaotian Jing , Android Kernel Team , Pan Bian , DTML , Martin Blumenstingl , linux-arm-msm , =?UTF-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= , Rob Herring , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Thomas Gleixner , Stanley Chu , Allison Randal , Linux ARM , Mathieu Malaterre , Greg Kroah-Hartman , Kuohong Wang , Adrian Hunter , Yong Mao , Linux Kernel Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 7 May 2020 at 18:33, Veerabhadrarao Badiganti wrote: > > > On 5/6/2020 10:06 PM, Ulf Hansson wrote: > > On Wed, 6 May 2020 at 15:01, Veerabhadrarao Badiganti > > wrote: > >> > >> On 4/28/2020 5:26 AM, Chun-Hung Wu wrote: > >>> Parse CQE bindings "supports-cqe" and "disable-cqe-dcmd" > >>> in mmc_of_parse(). > >>> > >>> Signed-off-by: Chun-Hung Wu > >>> --- > >>> drivers/mmc/core/host.c | 5 +++++ > >>> 1 file changed, 5 insertions(+) > >>> > >>> diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c > >>> index c876872..47521c6 100644 > >>> --- a/drivers/mmc/core/host.c > >>> +++ b/drivers/mmc/core/host.c > >>> @@ -302,6 +302,11 @@ int mmc_of_parse(struct mmc_host *host) > >>> host->caps2 |= MMC_CAP2_NO_SD; > >>> if (device_property_read_bool(dev, "no-mmc")) > >>> host->caps2 |= MMC_CAP2_NO_MMC; > >>> + if (device_property_read_bool(dev, "supports-cqe")) > >>> + host->caps2 |= MMC_CAP2_CQE; > >> This change is breaking emmc driver on qcom platforms where this dt > >> property is defined. > >> > >> [ 1.543453] cqhci_deactivate+0xc/0x38 > >> [ 1.545627] sdhci_msm_reset+0x40/0x58 > >> [ 1.549447] sdhci_do_reset+0x48/0x7c > >> [ 1.553180] __sdhci_read_caps+0x7c/0x214 > >> [ 1.556913] sdhci_setup_host+0x58/0xce8 > >> [ 1.560905] sdhci_msm_probe+0x588/0x8a4 > >> [ 1.564900] platform_drv_probe+0x4c/0xb0 > >> > >> So, we cant have this flag defined before sdhci_setup_host(). > >> > >> I will have to clear this cap and re-enable it in our initialization. > > Thanks for reporting! I have dropped all the four patches from > > Chun-Hung, so we can figure out how to fix this. > > > > Please help to review the next version of the series. > > Thanks Ulf. > > Hi Chun-Hung, > > On qcom controller CQE also gets reset when SDHC is reset. So we have to > explicitly disable CQE > by invoking cqhci_deactivate() during sdhc reset > > SDHC gets reset in sdhci_setup_host() even before cqe is initialized. > With MMC_CAP2_CQE_DCMD cap set even before sdhci_set_host(), we are > getting null pointer access with cqhci_deactivate(). > > If CQE getting reset with SDHC reset is generic (applicable to other > controllers) then you have revisit your logic. > If its not the case then only qcom driver would get affected. Thanks for clarifying the problem, much appreciated. To me, it looks like the DT parsing of the CQE properties are better suited to be managed by each sdhci variant, to continue to leave some room for flexibility. Chun-Hung, can you please drop patch 1 and patch2 from the series and adapt to this change in the mediatek variant? [...] Kind regards Uffe _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel