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Mon, 11 Feb 2019 12:43:08 +0000 Received: from CY4PR02MB2709.namprd02.prod.outlook.com ([fe80::bc8d:c1a1:e7d9:2983]) by CY4PR02MB2709.namprd02.prod.outlook.com ([fe80::bc8d:c1a1:e7d9:2983%10]) with mapi id 15.20.1601.023; Mon, 11 Feb 2019 12:43:08 +0000 From: Vishal Sagar To: Luca Ceresoli , Vishal Sagar , Hyun Kwon , "laurent.pinchart@ideasonboard.com" , "mchehab@kernel.org" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , Michal Simek , "linux-media@vger.kernel.org" , "devicetree@vger.kernel.org" , "sakari.ailus@linux.intel.com" , "hans.verkuil@cisco.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Dinesh Kumar , Sandip Kothari Subject: RE: [PATCH v3 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem Thread-Topic: [PATCH v3 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem Thread-Index: AQHUui2l5ecr9Ru5u0itGn9PqazmdqXaeJcAgAADeXA= Date: Mon, 11 Feb 2019 12:43:08 +0000 Message-ID: References: <1549025766-135037-1-git-send-email-vishal.sagar@xilinx.com> <1549025766-135037-3-git-send-email-vishal.sagar@xilinx.com> <3923069f-7c69-c601-0ded-f7629696ef9b@lucaceresoli.net> In-Reply-To: <3923069f-7c69-c601-0ded-f7629696ef9b@lucaceresoli.net> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=vsagar@xilinx.com; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Luca, Thanks for reviewing this. > -----Original Message----- > From: Luca Ceresoli [mailto:luca@lucaceresoli.net] > Sent: Monday, February 11, 2019 4:12 PM > To: Vishal Sagar ; Hyun Kwon ; > laurent.pinchart@ideasonboard.com; mchehab@kernel.org; > robh+dt@kernel.org; mark.rutland@arm.com; Michal Simek > ; linux-media@vger.kernel.org; > devicetree@vger.kernel.org; sakari.ailus@linux.intel.com; > hans.verkuil@cisco.com; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org; Dinesh Kumar ; Sandip Kothari > > Subject: Re: [PATCH v3 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx > Subsystem > > EXTERNAL EMAIL > > Hi Vishal, > > On 01/02/19 13:56, Vishal Sagar wrote: > > The Xilinx MIPI CSI-2 Rx Subsystem soft IP is used to capture images > > from MIPI CSI-2 camera sensors and output AXI4-Stream video data ready > > for image processing. Please refer to PG232 for details. > > For those unused to Xilinx documentation I'd use the full document name > ("MIPI CSI-2 Receiver Subsystem v4.0") or, even better, a stable URL if > available. > Ok. I will add the full documentation name here and URL. > > The driver is used to set the number of active lanes, if enabled > > in hardware. The CSI2 Rx controller filters out all packets except for > > the packets with data type fixed in hardware. RAW8 packets are always > > allowed to pass through. > > > > It is also used to setup and handle interrupts and enable the core. It > > logs all the events in respective counters between streaming on and off. > > The generic short packets received are notified to application via > > v4l2_events. > > > > The driver supports only the video format bridge enabled configuration. > > Some data types like YUV 422 10bpc, RAW16, RAW20 are supported when > the > > CSI v2.0 feature is enabled in design. When the VCX feature is enabled, > > the maximum number of virtual channels becomes 16 from 4. > > > > Signed-off-by: Vishal Sagar > > ... > > > +/** > > + * xcsi2rxss_reset - Does a soft reset of the MIPI CSI2 Rx Subsystem > > + * @core: Core Xilinx CSI2 Rx Subsystem structure pointer > > + * > > + * Core takes less than 100 video clock cycles to reset. > > + * So a larger timeout value is chosen for margin. > > + * > > + * Return: 0 - on success OR -ETIME if reset times out > > + */ > > +static int xcsi2rxss_reset(struct xcsi2rxss_core *core) > > +{ > > + u32 timeout = XCSI_TIMEOUT_VAL; > > The comment about the timeout is duplicated here and at the #define > line. Why not removing the define above and just putting > > u32 timeout = 1000; /* us */ > > here? It would make the entire timeout logic appear in a unique place. > Agree. It was kept like that as the timeout value was being used in some other place in earlier patch versions. I will do as suggested in next version. > > +static int xcsi2rxss_start_stream(struct xcsi2rxss_state *state) > > +{ > > + struct xcsi2rxss_core *core = &state->core; > > + int ret = 0; > > + > > + xcsi2rxss_enable(core); > > + > > + ret = xcsi2rxss_reset(core); > > + if (ret < 0) { > > + state->streaming = false; > > + return ret; > > + } > > + > > + xcsi2rxss_intr_enable(core); > > + state->streaming = true; > > Shouldn't you propagate s_stream to the upstream subdev here calling > v4l2_subdev_call(..., ..., s_stream, 1)? > This is done by the xvip_pipeline_start_stop() in xilinx-dma.c for Xilinx Video pipeline. > > + return ret; > > +} > > > -- > Luca Regards Vishal Sagar _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel