From: Anson Huang <anson.huang@nxp.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"will@kernel.org" <will@kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
"festevam@gmail.com" <festevam@gmail.com>,
dl-linux-imx <linux-imx@nxp.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
Leonard Crestez <leonard.crestez@nxp.com>,
Aisheng Dong <aisheng.dong@nxp.com>,
Daniel Baluta <daniel.baluta@nxp.com>,
Jacky Bai <ping.bai@nxp.com>,
"l.stach@pengutronix.de" <l.stach@pengutronix.de>,
Abel Vesa <abel.vesa@nxp.com>,
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"ccaione@baylibre.com" <ccaione@baylibre.com>,
"angus@akkea.ca" <angus@akkea.ca>,
"agx@sigxcpu.org" <agx@sigxcpu.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: RE: [PATCH V5 5/5] arm64: dts: imx8mm: Enable cpu-idle driver
Date: Fri, 16 Aug 2019 01:03:45 +0000 [thread overview]
Message-ID: <DB3PR0402MB39160C450FC99A359B2366BDF5AF0@DB3PR0402MB3916.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <34c03d76-ae61-63b4-153f-3f9911cc962e@linaro.org>
Hi, Daniel
> Hi Anson,
>
> sorry for the late review, I've been pretty busy.
That is OK for sure.
>
> If Shawn is ok, I can pick the patches 1-4 in my tree and then this one after
> you fix the comments below.
Shawn should be OK for it, and he already took patch [PATCH V5 2/5] arm64: Enable TIMER_IMX_SYS_CTR for ARCH_MXC platforms
since I ever sent it before in other series when system counter driver is NOT landing on main line, now it landed, Shawn just apply
that old patch, so in V6 patch I just sent, I did NOT include this patch, you can just apply the 4 patches in V6.
Hi, Shawn
Daniel will pick this whole patch series, please raise if you have any concern, thanks.
>
> On 10/07/2019 08:30, Anson.Huang@nxp.com wrote:
>
> [ ... ]
>
> > + idle-states {
> > + entry-method = "psci";
> > +
> > + cpu_sleep_wait: cpu-sleep-wait {
>
> Is that a retention state or a powerdown? It is preferable to change the name
> to the idle state naming convention given in the PSCI documentation [1] page
> 16-17
Thanks for your detail reference, it is a power down state with SoC entering WAIT mode,
so in V6, I change the name to "cpu_pd_wait:cpu-pd-wait".
>
>
> > + compatible = "arm,idle-state";
> > + arm,psci-suspend-param = <0x0010033>;
> > + local-timer-stop;
> > + entry-latency-us = <1000>;
> > + exit-latency-us = <700>;
> > + min-residency-us = <2700>;
> > + wakeup-latency-us = <1500>;
>
> It is pointless to specify the entry + exit *and* the wakeup-latency [2].
Ah, yes, this is new to me, I will just remove the “wakeup-latency-us” property.
Thanks,
Anson.
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next prev parent reply other threads:[~2019-08-16 1:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-10 6:30 [PATCH V5 1/5] clocksource: imx-sysctr: Add internal clock divider handle Anson.Huang
2019-07-10 6:30 ` [PATCH V5 2/5] arm64: Enable TIMER_IMX_SYS_CTR for ARCH_MXC platforms Anson.Huang
2019-07-22 3:12 ` Shawn Guo
2019-07-10 6:30 ` [PATCH V5 3/5] arm64: dts: imx8mm: Add system counter node Anson.Huang
2019-07-22 3:15 ` Shawn Guo
2019-07-23 2:29 ` Anson Huang
2019-07-10 6:30 ` [PATCH V5 4/5] arm64: dts: imx8mq: " Anson.Huang
2019-07-10 6:30 ` [PATCH V5 5/5] arm64: dts: imx8mm: Enable cpu-idle driver Anson.Huang
2019-08-15 16:12 ` Daniel Lezcano
2019-08-16 1:03 ` Anson Huang [this message]
2019-08-19 7:27 ` Shawn Guo
2019-08-06 1:55 ` [PATCH V5 1/5] clocksource: imx-sysctr: Add internal clock divider handle Anson Huang
2019-08-06 10:27 ` Daniel Lezcano
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