From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_RED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F7F7C433B4 for ; Mon, 26 Apr 2021 13:22:59 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 253766105A for ; Mon, 26 Apr 2021 13:22:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 253766105A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=xilinx.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References:Message-ID:Date: Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xOYwXzasC6aA7MzClmpWhPDi4gT8IRevMcnsDCk39sQ=; b=C+9Csfa218u03DVswu/OzMi4e bMx2nKrJBopzo9g7ypU8L3XhlRhsywrxTnVzRQP27ras6fVzZZRJlu7IuCM0recNFrfp9SuA2I9YA ld9D+79cb2QyZWDVx4ZFYG3lVJ8wFiN1UuY0HkhkaxTXraMq8iS+CgZdll0TdjGJIjniqSKHN9DGI Blirdx6DBjRnZ4AIDK1h9PB7EIWMxGTKV09dTf0RPy0Img8Hb1qqEQnOaZ61xGSQJjjQDNdjk0QvZ Cdnld7mMgkqLB7Kflpp0l3FZVQtuycN+DteSYLR89xMGO359Nezl0aaEAW6SfV1mgvv8w8/Bflzqe zOKCZ693w==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lb1Ah-007hZF-Ef; Mon, 26 Apr 2021 13:21:07 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lb1Ad-007hYK-1m for linux-arm-kernel@desiato.infradead.org; Mon, 26 Apr 2021 13:21:03 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=MIME-Version: Content-Transfer-Encoding:Content-Type:In-Reply-To:References:Message-ID:Date :Subject:CC:To:From:Sender:Reply-To:Content-ID:Content-Description; bh=E8IVo4wvmj8fEKThZFI11zUnnICHv41D16VlkIr1hv4=; b=43QxlMtrbCGJwduNT2PUoJ2bNm FbWZCb8uxi8r9dbBWZ9NPfdRgLa82EDiF7ZkofUFORNYJkNOVlu7XEK35KR592MyE00J007mupZMF icSJr+dK2vRAzBQHmaFWH1DKp5LJVgmsK+0oM5KsW+v70vDo3ynss/0PJaLMP9GwTywMUpWFeEo/i MV6NcP3kJDQrE4nB2Jnj2zUeNC5tiBM4Zs4yT2gh6GhMm83o6+HKT/PeSlAvee/I9VOHaLw8TpdBu i2YFeb4pm22+bFPbL4kfi9p+Oue1bqBAee8+UZCwuJpDIDNLFCWKcG+3qinl18PwwdI2L1ajIZ9Ho AdV9okgA==; Received: from mail-dm6nam10on2076.outbound.protection.outlook.com ([40.107.93.76] helo=NAM10-DM6-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lb1AZ-00Fyw9-PD for linux-arm-kernel@lists.infradead.org; Mon, 26 Apr 2021 13:21:01 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=RJcMEpK5RLPRWSwY5SGMKC8svSyCv847XcDZs++RwGTzdmkXBO3qQfCBZG7f6pcLKYm7PNcgZlPe661sVc4ZKM04mcFNJzYMp0T8L/AHmA73CYSnzAulhD1/bO2dIp71M3UlnMn7/ZQPHP17FVla2kZIhJBPOwN1Ibl+7SzZJm8ImY9UEZB9aCZ4vTikQejxv7LtthMaYXcNpMtkF8XT9p9Tauloh9M90rS/kHSt4resIJrbdgBB8d7XQUIOiSMQ9UsWD1PaBxjOui67bIvzEcA/5NUJKO6zeDbqu6K3BlH8d3UL0Qd74WKP2gSsS+S0xdKoLANs3CFQLNfWMdmkDg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=E8IVo4wvmj8fEKThZFI11zUnnICHv41D16VlkIr1hv4=; b=bJXRxDd8rj0TYOsM3fJiG0k0I5RCG/0Byqpez0cObLSeZeczSTeZ3TdHKM+PgBvZETAjgTgxLvx/RJmv1uy9P+zNt/vJp8adxdSONz6i+FJgIyeTPNpoWalGMsrvqR6uQvfUdCezV2+s+6WkCGyF7cNDv8u7eQiVWKZDUUfR/LBtFaqZc5fm2OByit60iTyfOxVIkkSda8KL+O+WgLbdALJU8GW5M8wYtSfmZsDtmpCUHIlaarm/a+7N2qsHu118xsEY0CcN2NBguwxjBW1q471pnrg/HBfI81aQxBbvtuS6agxEdf+Q5Z8ov9MGyHFOGWPcJ1QX3KNTLMOxbzlIBg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=xilinx.com; dmarc=pass action=none header.from=xilinx.com; dkim=pass header.d=xilinx.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xilinx.onmicrosoft.com; s=selector2-xilinx-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=E8IVo4wvmj8fEKThZFI11zUnnICHv41D16VlkIr1hv4=; b=aMr6v5JjoUQ3yqNGsfrGECOuO3XiKGIaOztYlyTSllHUDjSog/2mwsYlQOr+AjUxzOpV5Wm0N7ISHNBcog6daUCne369Q7OsDaOOYrXKEp4WAo+RGjoKZ8EIMow7Q08gLr5aY8dBB+8uS7K4XbaGt8vKQ+3RSTMOd5qUdbbkrVk= Received: from DM5PR02MB3877.namprd02.prod.outlook.com (2603:10b6:4:b9::34) by DM6PR02MB5276.namprd02.prod.outlook.com (2603:10b6:5:46::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4042.21; Mon, 26 Apr 2021 13:20:55 +0000 Received: from DM5PR02MB3877.namprd02.prod.outlook.com ([fe80::943b:e0c1:3e2b:4327]) by DM5PR02MB3877.namprd02.prod.outlook.com ([fe80::943b:e0c1:3e2b:4327%3]) with mapi id 15.20.4042.024; Mon, 26 Apr 2021 13:20:54 +0000 From: Sai Krishna Potthuri To: Andy Shevchenko CC: Linus Walleij , Rob Herring , Michal Simek , Greg Kroah-Hartman , linux-arm Mailing List , Linux Kernel Mailing List , devicetree , "open list:GPIO SUBSYSTEM" , git , "saikrishna12468@gmail.com" Subject: RE: [PATCH v6 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support Thread-Topic: [PATCH v6 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support Thread-Index: AQHXN1HnJ1dD/z2380CasZDNOXc+DarCQxoAgAQix4A= Date: Mon, 26 Apr 2021 13:20:54 +0000 Message-ID: References: <1619080202-31924-1-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com> <1619080202-31924-4-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-TNEF-Correlator: authentication-results: gmail.com; dkim=none (message not signed) header.d=none;gmail.com; dmarc=none action=none header.from=xilinx.com; x-originating-ip: [149.199.50.130] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 75cb4eb0-f10f-4ca5-f66a-08d908b61f2d x-ms-traffictypediagnostic: DM6PR02MB5276: x-ld-processed: 657af505-d5df-48d0-8300-c31994686c5c,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:1201; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: Y/ORp1j+NGDcO0EuupWT2cKZk4uqjLA9G4LSZugFiiOfky3LcbE+zUVZgTfFc+y8BCwbukxLuhvOAa3j7n0LsNeKezn6CQTry4jm2DGxQjLKREidRsFUbXF/cBDFoCmGf5WV6QsSZoPAo4o99MR/iqtW0iIb0HXIjmyYMVfSd/x9S5oSa362ruHYyfwU9VDq2GpkTJDuL275dlCsFfP2gmn2UinIx0GHZxUN8BtQwtxPHh0mqJY+XbU6N+c1gRxYF1P9nSGl0b4d+0lQYKYOQd8Lv1r4CoBEizmgbG1hZ7rYPfF9yVNzWran3E1cqO/Xb3yNyliXGv4sbLc+4559QwUvxi2YI4kYBzIU8O0mJqDXRU72dcDSunPoW00AnwjTqK+DeUTWhwLY2JSJTVts/clPU514gmr4BOxLJORCxIHCVcyXEa1HxnnTNmwuTnWXlpcbZeXbFI7TMMX4W/nGD1CLaSOMuiPKCUqHlaxjsKE6jmSLzZCcPdt5jF3mXlb1E+RInXHpDbKNNNOzRLNLC7PTmuH2CejPTQg3YHm+DAUE77zO0QMxIS2fFKFT122KEAj5EMK008UBWmUm6g5+k0CbGqJDBBsZrki6pI0+Cd0= x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM5PR02MB3877.namprd02.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(376002)(346002)(39860400002)(366004)(136003)(396003)(186003)(6916009)(8936002)(8676002)(26005)(38100700002)(86362001)(122000001)(478600001)(33656002)(83380400001)(316002)(2906002)(7696005)(9686003)(6506007)(53546011)(55016002)(7416002)(54906003)(4326008)(64756008)(71200400001)(66446008)(66946007)(66476007)(66556008)(76116006)(52536014)(5660300002); DIR:OUT; SFP:1101; x-ms-exchange-antispam-messagedata: =?utf-8?B?elAwMkR4Q29mTi9RMXVHNjU2UW00aFE0M3ErK2tWeE8rN2MzZVUvaG51U3lU?= =?utf-8?B?ZGEvb055NVJ5V0s5L1VNZlJyclYzekJ3Qk9WVlh6bzVLWWFzSVZkeWhnSjN3?= =?utf-8?B?dXNQaTcyak5oNmlhVlNaOVE5OUVnZ0ZqTURidFo0dHExcmQxRmpzZXY5Y2k4?= =?utf-8?B?a1BpaDkxcTB1aHBObWJ3bkpCYUZQclNqZkNkYVRpVmg5YjNCS3E4YUtiTDhZ?= =?utf-8?B?UmZ3SVpjSWdDQk54dmdQd1BDSCtuRVliSUNRM0lKVFk4R2JNVWF1SHdmWkZH?= =?utf-8?B?WmNIN2NHM2xMcVU2Q0s1TkY3enlzcUxWMGlyZktqcnJFQU4zQ3YvaEFuSmpn?= =?utf-8?B?ZERXVUllcUJlV05lR3AvbEFOdWhyZW1xRFBjeml6OS9hWDUrWWZnNVA0aWtS?= =?utf-8?B?Mk9KSWJTSkE1Sjd6RUUzN3loeXgycHRFeGJzc3hYZUdNcWV0ZWdZOWJSbDZ5?= =?utf-8?B?K2xSWUxhRUZ3MHZ0WlJjQjhqK2twOTFvc294b0w4NHhWbnVDcS9aNU9VVXRy?= =?utf-8?B?S2thaWRWTXhENlR5VTJ0alN6TlZBWU5KOEtQOEZaNHlTNys1RGMrQWFqbXVs?= =?utf-8?B?Tm51YzVpK2hDcTJGTnZGNlNhSGliUE13RnNsYjY1UDlLR2hsTVY4dzRDNEQ4?= =?utf-8?B?NVh6RDNiNkpqU0Vwc3lvZitvcWFxUTI2WklGZitYZFlzNkNEMkVKdmk3ZnIy?= =?utf-8?B?WGhUTEsvUGtHdXJJUmtGQVdPUDhFUFVvWUlOK0NiemVlZWlqODl1a2ZPVW4x?= =?utf-8?B?Zm5CaHl0R0llNWk1Nk0va2JJNkk3THorMEZHeStmMktucG4zTFRyTEEzQmxE?= =?utf-8?B?RFRsbXFFa3lTUUVBTDJaZGdrbmhlR3Z1U0paOTZyajFIQTZkeHZCUXFDVWhU?= =?utf-8?B?MGZQL21zU0J3b2NpQW1mVWZNbXFiU3NtQjZSRDJjeG42SlhXeTMxaE9nelNE?= =?utf-8?B?L243b1BNRmwreExBd003MEdKamY0cTBleWhJWjhZdUlKaXZNdVQwQlBnMUYw?= =?utf-8?B?MmxPa25CZFkzRFlwTHZCVE5qWDFXSVpadjBuOFY3TXBOeEhWSjFvMDBYWFhR?= =?utf-8?B?dGZOV2xrZnd3UHl6N0RrR3pib1h6Ni9PMzFKMkI3VGgvL3dlZzlIMnpLNlpR?= =?utf-8?B?b2JRNXNwaTRxenVPNlNaWUNpbTdhSnJicnhDSGx1dDBSOGpUYkZpZDR6Y2JY?= =?utf-8?B?L1Z4TUhJdFdQNHBqNkNiQlVhaWhDMU51ZEpNS1YwdTNrcks5SVlBVkRnUnFT?= =?utf-8?B?QlBVWmRMdk5XWWhVampXNWY1VnhKQUxGZ25DSWZaNU9QVWtpQ3dHSFFtOEVQ?= =?utf-8?B?UVQ3bENyeEpTN01JaSt4enJJUHdxNS9ibHh0NnBUREhOWkdjS3JLaGxTMEl2?= =?utf-8?B?eStNcEVqUEw0aEpzWnJJaEd5M2NwdjQyVGVJd0l1WWFqU0hDd2d1VzJNUnY1?= =?utf-8?B?QVJieHNNQmR0ajVJaFZuaUtHZy9hWWtFNm13V1BnT3JJRkhWRmNrWEFmS2Rh?= =?utf-8?B?K0cvTkRkby9KeSsrWmtoWFZPcGk1SnRqcHhPV251T1FWU0c2dlpTajkyNUYw?= =?utf-8?B?QjZyamtGelZZUDgySVNzUEVqNVRnbnFqYldkRjNkS2s2TGE2UnlRRnp5clhK?= =?utf-8?B?TFBmV25TbGNJR0hpLzNDcWZsQ2IrR1V1a3o4V1k5WXBJRDV3MS9zeHROb3FT?= =?utf-8?B?Z3VVcmlicEd4WVh4aWNRN3hTdWl2WGRyYjlRditjUjhRN1RheUR6MXJDREM1?= =?utf-8?Q?iiGUieArJtDvVqLyZaCxBf5zsri8iO7gEsut5q/?= MIME-Version: 1.0 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM5PR02MB3877.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 75cb4eb0-f10f-4ca5-f66a-08d908b61f2d X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Apr 2021 13:20:54.7782 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: AorYRVAvK54QjCa6pnLvTU6SphgtZw2LA9Jv1JhhAstWNyVEkfnsGZZA8QIQFtoO8mQ00/q48AVmFP9WvdKZUw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB5276 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210426_062059_901170_B1C0039C X-CRM114-Status: GOOD ( 29.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Andy Shevchenko, Thanks for the review. > -----Original Message----- > From: Andy Shevchenko > Sent: Friday, April 23, 2021 9:24 PM > To: Sai Krishna Potthuri > Cc: Linus Walleij ; Rob Herring > ; Michal Simek ; Greg Kroah- > Hartman ; linux-arm Mailing List kernel@lists.infradead.org>; Linux Kernel Mailing List kernel@vger.kernel.org>; devicetree ; open > list:GPIO SUBSYSTEM ; git ; > saikrishna12468@gmail.com > Subject: Re: [PATCH v6 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support > > On Thu, Apr 22, 2021 at 11:31 AM Sai Krishna Potthuri > wrote: > > > > Adding pinctrl driver for Xilinx ZynqMP platform. > > This driver queries pin information from firmware and registers pin > > control accordingly. > > > > Signed-off-by: Sai Krishna Potthuri > > > > You may reduce the number of LOCs by joining some lines. See below. > > ... > > > +config PINCTRL_ZYNQMP > > + tristate "Pinctrl driver for Xilinx ZynqMP" > > + depends on ZYNQMP_FIRMWARE > > + select PINMUX > > + select GENERIC_PINCONF > > + default ZYNQMP_FIRMWARE > > + help > > + This selects the pinctrl driver for Xilinx ZynqMP platform. > > + This driver will query the pin information from the firmware > > + and allow configuring the pins. > > + Configuration can include the mux function to select on those > > + pin(s)/group(s), and various pin configuration parameters > > + such as pull-up, slew rate, etc. > > Missed module name. Is this (module name) a configuration option in Kconfig? > > ... > > > +/* > > + * ZynqMP pin controller > > + * > > + * Copyright (C) 2020 Xilinx, Inc. > > 2021? Couple of versions for this patch series sent in 2020, hence maintaining the same. Is it like we maintain the year when this patch series is applied, which is 2021? > > > + * > > + * Sai Krishna Potthuri > > + * Rajan Vaja */ > > ... > > > +#include > > +#include > > +#include > > +#include > > +#include > > ... > > > +static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev, > > + unsigned int pin, > > + unsigned long *config) > > +{ > > + unsigned int arg, param = pinconf_to_config_param(*config); > > + int ret; > > > + if (pin >= zynqmp_desc.npins) > > + return -EOPNOTSUPP; > > Is it possible? This is a safe check. Pin information will get from dt files/Xilinx firmware (query pin information for a group)/user application and there are chances of getting wrong pin. > > > + switch (param) { > > + case PIN_CONFIG_SLEW_RATE: > > + param = PM_PINCTRL_CONFIG_SLEW_RATE; > > + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); > > + break; > > + case PIN_CONFIG_BIAS_PULL_UP: > > + param = PM_PINCTRL_CONFIG_PULL_CTRL; > > > + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); > > + if (arg != PM_PINCTRL_BIAS_PULL_UP) > > + return -EINVAL; > > Error code being shadowed. Instead check it here properly. Are you mentioning the case where ret is also a non-zero? If yes, then I will update this check to if (!ret && arg != PM_PINCTRL_BIAS_PULL_UP) return -EINVAL; ret non-zero case, we are handling at the end of switch case. > > > + arg = 1; > > + break; > > + case PIN_CONFIG_BIAS_PULL_DOWN: > > + param = PM_PINCTRL_CONFIG_PULL_CTRL; > > + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); > > + if (arg != PM_PINCTRL_BIAS_PULL_DOWN) > > + return -EINVAL; > > Ditto. Same as above. > > > + arg = 1; > > + break; > > + case PIN_CONFIG_BIAS_DISABLE: > > + param = PM_PINCTRL_CONFIG_BIAS_STATUS; > > + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); > > + if (arg != PM_PINCTRL_BIAS_DISABLE) > > + return -EINVAL; > > Ditto. Same as above. > > > + arg = 1; > > + break; > > + case PIN_CONFIG_POWER_SOURCE: > > + param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; > > + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); > > + break; > > + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: > > + param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; > > + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); > > + break; > > + case PIN_CONFIG_DRIVE_STRENGTH: > > + param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; > > + ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); > > + switch (arg) { > > + case PM_PINCTRL_DRIVE_STRENGTH_2MA: > > + arg = DRIVE_STRENGTH_2MA; > > + break; > > + case PM_PINCTRL_DRIVE_STRENGTH_4MA: > > + arg = DRIVE_STRENGTH_4MA; > > + break; > > + case PM_PINCTRL_DRIVE_STRENGTH_8MA: > > + arg = DRIVE_STRENGTH_8MA; > > + break; > > + case PM_PINCTRL_DRIVE_STRENGTH_12MA: > > + arg = DRIVE_STRENGTH_12MA; > > + break; > > + default: > > + /* Invalid drive strength */ > > + dev_warn(pctldev->dev, > > + "Invalid drive strength for pin %d\n", > > + pin); > > + return -EINVAL; > > + } > > + break; > > + default: > > + ret = -EOPNOTSUPP; > > + break; > > + } > > + > > + if (ret) > > + return ret; > > + > > + param = pinconf_to_config_param(*config); > > + *config = pinconf_to_config_packed(param, arg); > > + > > + return 0; > > +} > > ... > > > + ret = -EOPNOTSUPP; > > Isn't it ENOTSUP for all cases here? Giving 'Operation Not Supported (EOPNOTSUPP)' error, when driver gets a request for unsupported pin or configuration. Can you please elaborate your question if I didn't answer properly. > > ... > > > + ret = zynqmp_pm_query_data(qdata, payload); > > + if (ret) > > + return ret; > > + > > + *ngroups = payload[1]; > > + > > > + return ret; > > return 0; I will fix. > > ... > > > + * Query firmware to get group IDs for each function. Firmware returns > > + * group IDs. Based on group index for the function, group names in > > on the group > > > + * the function are stored. For example, the first group in "eth0" function > > + * is named as "eth0_0" and second group as "eth0_1" and so on. > > and the second > > > + * > > + * Based on the group ID received from the firmware, function stores > name of > > + * the group for that group ID. For example, if "eth0" first group ID > > + * is x, groups[x] name will be stored as "eth0_0". > > + * > > + * Once done for each function, each function would have its group names > > + * and each groups would also have their names. > > each group I will fix all the above. > > ... > > > +done: > > + func->groups = fgroups; > > + > > + return ret; > > return 0; ? > > ... > > > + *nfuncs = payload[1]; > > + > > + return ret; > > Ditto. > > ... > > > + ret = zynqmp_pm_query_data(qdata, payload); > > + if (ret) > > + return ret; > > + > > + memcpy(groups, &payload[1], > PINCTRL_GET_PIN_GROUPS_RESP_LEN); > > + > > + return ret; > > Ditto. > > ... > > > + * Query firmware to get groups available for the given pin. > > + * Based on the firmware response(group IDs for the pin), add > > + * pin number to the respective group's pin array. > > + * > > + * Once all pins are queries, each groups would have its number > > each group > > > + * of pins and pin numbers data. > > ... > > > + return ret; > > return 0; > > ... > > > + * Query number of functions and number of function groups (number > > + * of groups in given function) to allocate required memory buffers > > in the given > > > + * for functions and groups. Once buffers are allocated to store > > + * functions and groups data, query and store required information > > + * (number of groups and group names for each function, number of > > + * pins and pin numbers for each group). > > ... > > > + pctrl->funcs = funcs; > > + pctrl->groups = groups; > > + > > + return ret; > > return 0; > > ... > > > + *npins = payload[1]; > > + > > + return ret; > > Ditto. I will fix all the above similar comments. > > ... > > > + dev_err(&pdev->dev, "pin desc prepare fail with %d\n", > > + ret); > > One line. > > ... > > > + dev_err(&pdev->dev, "function info prepare fail with %d\n", > > + ret); > > Ditto. I will fix all. > > ... > > > + pctrl->pctrl = pinctrl_register(&zynqmp_desc, &pdev->dev, pctrl); > > devm_pinctrl_register() I will update. > > > + if (IS_ERR(pctrl->pctrl)) > > + return PTR_ERR(pctrl->pctrl); > > ... > > > +}; > > > + > > Extra blank line. > > > +MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match); > > ... > > > +}; > > > + > > Ditto. I see some drivers are maintaining the extra line in above two cases. We shouldn't maintain extra line after struct declaration? Regards Sai Krishna > > > +module_platform_driver(zynqmp_pinctrl_driver); > > -- > With Best Regards, > Andy Shevchenko _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel