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From: Gustavo Pimentel <Gustavo.Pimentel@synopsys.com>
To: Andrew Murray <andrew.murray@arm.com>, Xiaowei Bao <xiaowei.bao@nxp.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
	"roy.zang@nxp.com" <roy.zang@nxp.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"arnd@arndb.de" <arnd@arndb.de>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"zhiqiang.hou@nxp.com" <zhiqiang.hou@nxp.com>,
	"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kishon@ti.com" <kishon@ti.com>,
	"minghuan.Lian@nxp.com" <minghuan.Lian@nxp.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"gustavo.pimentel@synopsys.com" <Gustavo.Pimentel@synopsys.com>,
	"leoyang.li@nxp.com" <leoyang.li@nxp.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"mingkai.hu@nxp.com" <mingkai.hu@nxp.com>
Subject: RE: [PATCH v3 08/11] PCI: layerscape: Modify the MSIX to the doorbell mode
Date: Thu, 12 Sep 2019 11:24:03 +0000
Message-ID: <DM6PR12MB40100CC1C0E64040652C3BFBDAB00@DM6PR12MB4010.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20190902120147.GH9720@e119886-lin.cambridge.arm.com>

Hi,

Sorry for the delay I was in parental leave and I'm still trying not to 
drown in the mailing list emails... 😊

On Mon, Sep 2, 2019 at 13:1:47, Andrew Murray <andrew.murray@arm.com> 
wrote:

> On Mon, Sep 02, 2019 at 11:17:13AM +0800, Xiaowei Bao wrote:
> > dw_pcie_ep_raise_msix_irq was never called in the exisitng driver
> > before, because the ls1046a platform don't support the MSIX feature
> > and msix_capable was always set to false.
> > Now that add the ls1088a platform with MSIX support, but the existing
> > dw_pcie_ep_raise_msix_irq doesn't work, so use the doorbell method to
> > support the MSIX feature.

Hum... the implementation of msix implementation did work on my use case, 
however, at the time the setup used for developing and testing the 
implementation only had one PF (by default 0). Perhaps this could was is 
causing the different behavior between our setups.

You have more than one PF, right?

If I remember correctly, msix feature support entered on kernel 4.19 
version and it worked quite well at the time, but I didn't test since 
there (I've to manage time to be able to retest it again), I'm didn't 
seen any patch that could interfere with this.

Regards,
Gustavo


> > 
> > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> 
> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
> 
> > ---
> > v2: 
> >  - No change
> > v3:
> >  - Modify the commit message make it clearly.
> > 
> >  drivers/pci/controller/dwc/pci-layerscape-ep.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > index 1e07287..5f0cb99 100644
> > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > @@ -79,7 +79,8 @@ static int ls_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
> >  	case PCI_EPC_IRQ_MSI:
> >  		return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num);
> >  	case PCI_EPC_IRQ_MSIX:
> > -		return dw_pcie_ep_raise_msix_irq(ep, func_no, interrupt_num);
> > +		return dw_pcie_ep_raise_msix_irq_doorbell(ep, func_no,
> > +							  interrupt_num);
> >  	default:
> >  		dev_err(pci->dev, "UNKNOWN IRQ type\n");
> >  		return -EINVAL;
> > -- 
> > 2.9.5
> > 


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Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-02  3:17 [PATCH v3 00/11] *** SUBJECT HERE *** Xiaowei Bao
2019-09-02  3:17 ` [PATCH v3 01/11] PCI: designware-ep: Add multiple PFs support for DWC Xiaowei Bao
2019-09-02 16:26   ` Andrew Murray
2019-09-03  3:43     ` Xiaowei Bao
2019-09-26 10:29       ` Andrew Murray
2019-09-26 13:38         ` Gustavo Pimentel
2019-09-02  3:17 ` [PATCH v3 02/11] PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode Xiaowei Bao
2019-09-02  3:17 ` [PATCH v3 03/11] PCI: designware-ep: Move the function of getting MSI capability forward Xiaowei Bao
2019-09-02  3:17 ` [PATCH v3 04/11] PCI: designware-ep: Modify MSI and MSIX CAP way of finding Xiaowei Bao
2019-09-02 15:07   ` Andrew Murray
2019-09-03  2:33     ` Xiaowei Bao
2019-09-02  3:17 ` [PATCH v3 05/11] dt-bindings: pci: layerscape-pci: add compatible strings for ls1088a and ls2088a Xiaowei Bao
2019-09-02 12:31   ` Andrew Murray
2019-09-03  1:33     ` Xiaowei Bao
2019-09-02  3:17 ` [PATCH v3 06/11] PCI: layerscape: Fix some format issue of the code Xiaowei Bao
2019-09-02  3:17 ` [PATCH v3 07/11] PCI: layerscape: Modify the way of getting capability with different PEX Xiaowei Bao
2019-09-02 13:37   ` Andrew Murray
2019-09-03  2:13     ` Xiaowei Bao
2019-09-02  3:17 ` [PATCH v3 08/11] PCI: layerscape: Modify the MSIX to the doorbell mode Xiaowei Bao
2019-09-02 12:01   ` Andrew Murray
2019-09-12 11:24     ` Gustavo Pimentel [this message]
2019-09-14  6:37       ` Xiaowei Bao
2019-09-16  8:54         ` Gustavo Pimentel
2019-09-02  3:17 ` [PATCH v3 09/11] PCI: layerscape: Add EP mode support for ls1088a and ls2088a Xiaowei Bao
2019-09-02 12:46   ` Andrew Murray
2019-09-03  1:47     ` Xiaowei Bao
2019-09-12 12:49       ` Andrew Murray
2019-09-14  4:10         ` Xiaowei Bao
2019-09-16 14:37           ` Andrew Murray
2019-09-18  3:17             ` Xiaowei Bao
2019-09-02  3:17 ` [PATCH v3 10/11] arm64: dts: layerscape: Add PCIe EP node for ls1088a Xiaowei Bao
2019-09-02 13:06   ` Andrew Murray
2019-09-03  2:01     ` Xiaowei Bao
2019-09-12 13:01       ` Andrew Murray
2019-09-14  4:15         ` Xiaowei Bao
2019-09-02  3:17 ` [PATCH v3 11/11] misc: pci_endpoint_test: Add LS1088a in pci_device_id table Xiaowei Bao
2019-09-02 12:54   ` Andrew Murray
2019-09-03  1:52     ` Xiaowei Bao
2019-09-12 12:59       ` Andrew Murray
2019-09-14  4:13         ` Xiaowei Bao
2019-09-02  3:52 ` [PATCH v3 00/11] *** SUBJECT HERE *** Z.q. Hou
2019-09-02  3:54   ` Xiaowei Bao

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