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Wed, 18 Aug 2021 10:09:17 +0000 From: Piyush Mehta To: Ahmad Fatoum , "arnd@arndb.de" , "zou_wei@huawei.com" , "gregkh@linuxfoundation.org" , "linus.walleij@linaro.org" , Michal Simek , Jiaying Liang , "iwamatsu@nigauri.org" , "bgolaszewski@baylibre.com" , "robh+dt@kernel.org" , Rajan Vaja CC: "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , git , Srinivas Goud , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Pengutronix Kernel Team Subject: RE: [PATCH V3 3/3] gpio: modepin: Add driver support for modepin GPIO controller Thread-Topic: [PATCH V3 3/3] gpio: modepin: Add driver support for modepin GPIO controller Thread-Index: AQHXlAiba+p8agT4/0mzE0t9iLwfL6t49I4AgAAN9tA= Date: Wed, 18 Aug 2021 10:09:17 +0000 Message-ID: References: <20210818081018.2620544-1-piyush.mehta@xilinx.com> <20210818081018.2620544-4-piyush.mehta@xilinx.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-TNEF-Correlator: authentication-results: pengutronix.de; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Ahmad, -----Original Message----- From: Ahmad Fatoum Sent: Wednesday, August 18, 2021 2:22 PM To: Piyush Mehta ; arnd@arndb.de; zou_wei@huawei.com; gregkh@linuxfoundation.org; linus.walleij@linaro.org; Michal Simek ; Jiaying Liang ; iwamatsu@nigauri.org; bgolaszewski@baylibre.com; robh+dt@kernel.org; Rajan Vaja Cc: linux-gpio@vger.kernel.org; devicetree@vger.kernel.org; git ; Srinivas Goud ; linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Pengutronix Kernel Team Subject: Re: [PATCH V3 3/3] gpio: modepin: Add driver support for modepin GPIO controller On 18.08.21 10:10, Piyush Mehta wrote: > This patch adds driver support for the zynqmp modepin GPIO controller. > GPIO modepin driver set and get the value and status of the PS_MODE > pin, based on device-tree pin configuration. These four mode pins are > configurable as input/output. The mode pin has a control register, > which have lower four-bits [0:3] are configurable as input/output, > next four-bits can be used for reading the data as input[4:7], and > next setting the output pin state output[8:11]. > > Signed-off-by: Piyush Mehta > Acked-by: Michal Simek > Reviewed-by: Linus Walleij > --- > +/** > + * modepin_gpio_dir_in - Set the direction of the specified GPIO pin as input > + * @chip: gpio_chip instance to be worked on > + * @pin: gpio pin number within the device > + * > + * Return: 0 always > + */ > +static int modepin_gpio_dir_in(struct gpio_chip *chip, unsigned int > +pin) { > + return 0; > +} You say the gpio controller can configure pins as inputs or outputs. These pins are controller via firmware driver. We are updating BOOT_PIN_CTRL 0xFF5E0250 register. [0:3] = When 0, the pins will be inputs from the board to the PS. When 1, the PS will drive these pins [4:7] = Value captured from the mode pins [8:11] = Value driven onto the mode pins, when control register bit set out = 1 The lower four-bits [0:3] we can set either input and output, based on configuration we read pin as for input [4:7] and write on pin [8:11]. Example: If we want to configure pin 1 as output, then we will configure as [0:3]=[0100], for access pin will trigger upper bit [8:11]=[0100]. Based on https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf page 46 PS_MODE Input/Output Dedicated 4-bit boot mode pins sampled on POR deassertion Xilinx is using this pin for usb phy resets. Yet, .direction_input is doing nothing. So, it's not clear to me, how this sequence could work: - set gpio output high (writes bootmode) - set gpio to input (no-op, pin will remain high, not high impedance) I didn't check the previous discussions, but if this indeed works as intended, the how should be written here into the driver. That is a more useful comment than kernel doc for a stub function. -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | Regards, Piyush Mehta _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel