linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Leonard Crestez <leonard.crestez@nxp.com>
To: Adam Ford <aford173@gmail.com>, Rob Herring <robh+dt@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>
Cc: "Mark Rutland" <mark.rutland@arm.com>,
	"Artur Świgoń" <a.swigon@partner.samsung.com>,
	"Jacky Bai" <ping.bai@nxp.com>,
	"Viresh Kumar" <viresh.kumar@linaro.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Angus Ainslie" <angus@akkea.ca>,
	"Alexandre Bailon" <abailon@baylibre.com>,
	"Matthias Kaehlcke" <mka@chromium.org>,
	"Abel Vesa" <abel.vesa@nxp.com>,
	"Saravana Kannan" <saravanak@google.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	"Chanwoo Choi" <cw00.choi@samsung.com>,
	"MyungJoo Ham" <myungjoo.ham@samsung.com>,
	dl-linux-imx <linux-imx@nxp.com>,
	devicetree <devicetree@vger.kernel.org>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"Martin Kepplinger" <martink@posteo.de>,
	"Silvano Di Ninno" <silvano.dininno@nxp.com>,
	arm-soc <linux-arm-kernel@lists.infradead.org>,
	"Aisheng Dong" <aisheng.dong@nxp.com>,
	"Anson Huang" <anson.huang@nxp.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	"Kyungmin Park" <kyungmin.park@samsung.com>,
	"Sascha Hauer" <kernel@pengutronix.de>,
	"Fabio Estevam" <fabio.estevam@nxp.com>,
	"Georgi Djakov" <georgi.djakov@linaro.org>
Subject: Re: [PATCH v7 5/5] arm64: dts: imx8m: Add ddr controller nodes
Date: Fri, 29 Nov 2019 05:33:55 +0000	[thread overview]
Message-ID: <VI1PR04MB702390E22E7273310BE47747EE460@VI1PR04MB7023.eurprd04.prod.outlook.com> (raw)
In-Reply-To: CAHCN7xK_w9m7sZOJtGFVtpeu1BHN_H6eyeYCOgZQS67t1SvmRQ@mail.gmail.com

On 2019-11-28 4:43 PM, Adam Ford wrote:
> On Fri, Nov 22, 2019 at 3:46 PM Leonard Crestez <leonard.crestez@nxp.com> wrote:
>>
>> This is used by the imx-ddrc devfreq driver to implement dynamic
>> frequency scaling of DRAM.
>>
>> Support for proactive scaling via interconnect will come later. The
>> high-performance bus masters which need that (display, vpu, gpu) are
>> mostly not yet enabled in upstream anyway.
>>
>> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
>> ---
>>   arch/arm64/boot/dts/freescale/imx8mm-evk.dts  | 18 ++++++++++++++
>>   arch/arm64/boot/dts/freescale/imx8mm.dtsi     | 10 ++++++++
>>   .../boot/dts/freescale/imx8mn-ddr4-evk.dts    | 18 ++++++++++++++
>>   arch/arm64/boot/dts/freescale/imx8mn.dtsi     | 10 ++++++++
>>   arch/arm64/boot/dts/freescale/imx8mq-evk.dts  | 24 +++++++++++++++++++
>>   arch/arm64/boot/dts/freescale/imx8mq.dtsi     | 10 ++++++++
>>   6 files changed, 90 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
>> index 28ab17a277bb..ecf0d385c164 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
>> @@ -75,10 +75,28 @@
>>
>>   &A53_0 {
>>          cpu-supply = <&buck2_reg>;
>>   };
>>
>> +&ddrc {
>> +       operating-points-v2 = <&ddrc_opp_table>;
>> +
>> +       ddrc_opp_table: opp-table {
>> +               compatible = "operating-points-v2";
>> +
>> +               opp-25M {
>> +                       opp-hz = /bits/ 64 <25000000>;
>> +               };
>> +               opp-100M {
>> +                       opp-hz = /bits/ 64 <100000000>;
>> +               };
>> +               opp-750M {
>> +                       opp-hz = /bits/ 64 <750000000>;
>> +               };
>> +       };
>> +};
> 
> The SoC's device tree has the opp for the SoC.  Since the SoC also has
> the DDR controller, why not put the opp for the DDR into the SoC's
> device tree set for its maximum rates.  If the individual boards need
> to change them, they can do it on a case-by-case basis.
> 
> As more and more people add devices based on imx8m q/m/n, I can
> imaging a lot of these entries will be duplicated if they base their
> design on the reference evk for their respective SoC.

The OPPs can vary from board to board for the same SoC. For example ddr4 
and lpddr4 variants of the NXP evk boards have different setpoints.

If a default set was included in soc dtsi then some boards would end up 
having to use /delete-node/ and I wanted to avoid that. Last I check 
that feature wasn't even officially documented for dtc?

Perhaps this could be revisited if it ends up being duplicated on many 
boards.

--
Regards,
Leonard

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2019-11-29  5:34 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-22 21:44 [PATCH v7 0/5] PM / devfreq: Add dynamic scaling for imx8m ddr controller Leonard Crestez
2019-11-22 21:45 ` [PATCH v7 1/5] clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocks Leonard Crestez
2019-11-25  1:25   ` Stephen Boyd
2019-12-09  1:15   ` Shawn Guo
2019-11-22 21:45 ` [PATCH v7 2/5] clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHE Leonard Crestez
2019-11-25  1:26   ` Stephen Boyd
2019-12-09  1:16   ` Shawn Guo
2019-11-22 21:45 ` [PATCH v7 3/5] dt-bindings: memory: Add bindings for imx8m ddr controller Leonard Crestez
2019-11-22 21:45 ` [PATCH v7 4/5] PM / devfreq: Add dynamic scaling " Leonard Crestez
2019-11-24 23:59   ` Chanwoo Choi
2019-11-26 19:44     ` Rob Herring
2019-11-26 23:25       ` Chanwoo Choi
2019-11-22 21:45 ` [PATCH v7 5/5] arm64: dts: imx8m: Add ddr controller nodes Leonard Crestez
2019-11-28 14:43   ` Adam Ford
2019-11-29  5:33     ` Leonard Crestez [this message]
2019-12-09  1:34   ` Shawn Guo
2019-12-18 13:35 ` [PATCH v7 0/5] PM / devfreq: Add dynamic scaling for imx8m ddr controller Adam Ford
2019-12-18 14:44   ` Leonard Crestez
2019-12-18 15:05     ` Adam Ford
2019-12-18 15:16       ` Leonard Crestez
2019-12-18 15:37         ` Adam Ford
2019-12-18 16:22           ` Leonard Crestez
2019-12-18 16:42             ` Adam Ford
     [not found]               ` <CAHCN7xKjpN_XEGLj-1jMG5mBbF=su67k+10frheLt+L1XaR0-g@mail.gmail.com>
2020-01-13 23:36                 ` Leonard Crestez
2020-01-15 20:09                   ` Adam Ford

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=VI1PR04MB702390E22E7273310BE47747EE460@VI1PR04MB7023.eurprd04.prod.outlook.com \
    --to=leonard.crestez@nxp.com \
    --cc=a.swigon@partner.samsung.com \
    --cc=abailon@baylibre.com \
    --cc=abel.vesa@nxp.com \
    --cc=aford173@gmail.com \
    --cc=aisheng.dong@nxp.com \
    --cc=angus@akkea.ca \
    --cc=anson.huang@nxp.com \
    --cc=cw00.choi@samsung.com \
    --cc=devicetree@vger.kernel.org \
    --cc=fabio.estevam@nxp.com \
    --cc=georgi.djakov@linaro.org \
    --cc=kernel@pengutronix.de \
    --cc=krzk@kernel.org \
    --cc=kyungmin.park@samsung.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-imx@nxp.com \
    --cc=linux-pm@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=martink@posteo.de \
    --cc=mka@chromium.org \
    --cc=mturquette@baylibre.com \
    --cc=myungjoo.ham@samsung.com \
    --cc=ping.bai@nxp.com \
    --cc=rjw@rjwysocki.net \
    --cc=robh+dt@kernel.org \
    --cc=saravanak@google.com \
    --cc=sboyd@kernel.org \
    --cc=shawnguo@kernel.org \
    --cc=silvano.dininno@nxp.com \
    --cc=viresh.kumar@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).