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Tue, 22 Dec 2020 07:50:00 +0000 Received: from perceval.ideasonboard.com ([2001:4b98:dc2:55:216:3eff:fef7:d647]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1krcQf-00066L-O0 for linux-arm-kernel@lists.infradead.org; Tue, 22 Dec 2020 07:49:58 +0000 Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B6445122D; Tue, 22 Dec 2020 08:49:55 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1608623395; bh=Exqr1U7ZK5QA2QmOpysmWhIMOufJ5nlRZH7MblTh1xg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=ufqjcqB8eooPQQUZwxD210unOKskt2p0/MyNZi0Xw53oJm1TBoJCi88YSTSfY2O1/ cX/C058N4t6QxvrRO2lEHXqCk83fkAbwtr8NTsND9LRTmWp47LHlbM0RU+ccGYpaoX pM2rqLghSRJ3GVrKQN0Uyo5dxPK8nxgJho2HgpPI= Date: Tue, 22 Dec 2020 09:49:47 +0200 From: Laurent Pinchart To: Liu Ying Subject: Re: [PATCH 11/14] dt-bindings: display: bridge: Add i.MX8qm/qxp LVDS display bridge binding Message-ID: References: <1608199173-28760-1-git-send-email-victor.liu@nxp.com> <1608199173-28760-12-git-send-email-victor.liu@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201222_024957_917259_905D6E3A X-CRM114-Status: GOOD ( 26.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, jernej.skrabec@siol.net, kernel@pengutronix.de, narmstrong@baylibre.com, airlied@linux.ie, festevam@gmail.com, s.hauer@pengutronix.de, jonas@kwiboo.se, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, kishon@ti.com, a.hajda@samsung.com, vkoul@kernel.org, robh+dt@kernel.org, linux-imx@nxp.com, daniel@ffwll.ch, mchehab@kernel.org, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Liu, On Tue, Dec 22, 2020 at 09:36:37AM +0200, Laurent Pinchart wrote: > On Thu, Dec 17, 2020 at 05:59:30PM +0800, Liu Ying wrote: > > This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB). > > > > Signed-off-by: Liu Ying > > --- > > .../bindings/display/bridge/fsl,imx8qxp-ldb.yaml | 185 +++++++++++++++++++++ > > 1 file changed, 185 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml > > new file mode 100644 > > index 00000000..4e5ff6f > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml > > @@ -0,0 +1,185 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Freescale i.MX8qm/qxp LVDS Display Bridge > > + > > +maintainers: > > + - Liu Ying > > + > > +description: | > > + The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels. > > + > > + For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color > > + format and can map the input to VESA or JEIDA standards. The two channels > > + cannot be used simultaneously, that is to say, the user should pick one of > > + them to use. Two LDB channels from two LDB instances can work together in > > + LDB split mode to support a dual link LVDS display. The channel indexes > > + have to be different. Channel0 outputs odd pixels and channel1 outputs > > + even pixels. > > In this case, does the display controller output odd pixels and even > pixels separately to the two LVDS channels, with each channel > effectively be a separate LVDS encoder ? Could you give an example of DT > integration for dual-link LVDS support, with the display controller, two > LDB instances, and a dual-link LVDS panel ? I also can't find any mention of the LDB in IMX8MDQLQRM or IMX8DQXPRM. Am I missing something ? > > + > > + For i.MX8qm LDB, each channel additionally supports up to 30bpp parallel > > + input color format. The two channels can be used simultaneously, either > > + in dual mode or split mode. In dual mode, the two channels output identical > > + data. In split mode, channel0 outputs odd pixels and channel1 outputs even > > + pixels. > > + > > +properties: > > + compatible: > > + enum: > > + - fsl,imx8qm-ldb > > + - fsl,imx8qxp-ldb > > + > > + "#address-cells": > > + const: 1 > > + > > + "#size-cells": > > + const: 0 > > + > > + clocks: > > + items: > > + - description: pixel clock > > + - description: bypass clock > > + > > + clock-names: > > + items: > > + - const: pixel > > + - const: bypass > > + > > + power-domains: > > + maxItems: 1 > > + > > + fsl,syscon: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + description: | > > + A phandle which points to Control and Status Registers(CSR) module. > > + > > + fsl,companion-ldb: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + description: | > > + A phandle which points to companion LDB which is used in LDB split mode. > > + > > +patternProperties: > > + "^channel@[0-1]$": > > + type: object > > + description: Represents a channel of LDB. > > + > > + properties: > > + "#address-cells": > > + const: 1 > > + > > + "#size-cells": > > + const: 0 > > + > > + reg: > > + description: The channel index. > > + enum: [ 0, 1 ] > > + > > + phys: > > + description: A phandle to the phy module representing the LVDS PHY. > > + maxItems: 1 > > + > > + phy-names: > > + const: lvds_phy > > + > > + port@0: > > + type: object > > + description: Input port of the channel. > > + > > + properties: > > + reg: > > + const: 0 > > + > > + required: > > + - reg > > + > > + port@1: > > + type: object > > + description: Output port of the channel. > > + > > + properties: > > + reg: > > + const: 1 > > + > > + required: > > + - reg > > + > > + required: > > + - "#address-cells" > > + - "#size-cells" > > + - reg > > + - phys > > + - phy-names > > + > > + additionalProperties: false > > + > > +required: > > + - compatible > > + - "#address-cells" > > + - "#size-cells" > > + - clocks > > + - clock-names > > + - power-domains > > + - fsl,syscon > > + - channel@0 > > + - channel@1 > > + > > +allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: fsl,imx8qm-ldb > > + then: > > + properties: > > + fsl,companion-ldb: false > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include > > + ldb { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + compatible = "fsl,imx8qxp-ldb"; > > + clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2>, > > + <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>; > > + clock-names = "pixel", "bypass"; > > + power-domains = <&pd IMX_SC_R_LVDS_0>; > > + fsl,syscon = <&mipi_lvds_0_csr>; > > + > > + channel@0 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + reg = <0>; > > + phys = <&mipi_lvds_0_phy>; > > + phy-names = "lvds_phy"; > > + > > + port@0 { > > + reg = <0>; > > + > > + mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi: endpoint { > > + remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0>; > > + }; > > + }; > > + }; > > + > > + channel@1 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + reg = <1>; > > + phys = <&mipi_lvds_0_phy>; > > + phy-names = "lvds_phy"; > > + > > + port@0 { > > + reg = <0>; > > + > > + mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi: endpoint { > > + remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1>; > > + }; > > + }; > > + }; > > + }; > > -- > Regards, > > Laurent Pinchart -- Regards, Laurent Pinchart _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel