From: Catalin Marinas <catalin.marinas@arm.com>
To: Yunfeng Ye <yeyunfeng@huawei.com>
Cc: will@kernel.org, wangkefeng.wang@huawei.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linfeilong@huawei.com
Subject: Re: [PATCH 4/5] arm64: mm: Support ASID isolation feature
Date: Wed, 9 Nov 2022 12:43:51 +0000 [thread overview]
Message-ID: <Y2ughyNLh9EFw3HT@arm.com> (raw)
In-Reply-To: <20221017083203.3690346-5-yeyunfeng@huawei.com>
On Mon, Oct 17, 2022 at 04:32:02PM +0800, Yunfeng Ye wrote:
> After a rollover, the global generation will be flushed, which will
> cause the process mm->context.id on all CPUs do not match the
> generation. Thus, the process will compete for the global spinlock lock
> to reallocate a new ASID and refresh the TLBs of all CPUs on context
> switch. This will lead to the increase of scheduling delay and TLB miss.
>
> In some delay-sensitive scenarios, for example, part of CPUs are
> isolated, only a limited number of processes are deployed to run on the
> isolated CPUs. In this case, we do not want these key processes to be
> affected by the rollover of ASID.
Part of this commit log should also go in the cover letter and it would
help to back this up by some numbers, e.g. what percentage improvement
you get with this patchset by running hackbench on an isolated CPU.
In theory it looks like CPU isolation would benefit from this patchset
but we try not to touch this code often, so any modification should come
with proper justification, backed by numbers.
Note that I haven't reviewed the algorithm you are proposing in detail,
only had a brief look.
--
Catalin
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next prev parent reply other threads:[~2022-11-09 12:45 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-17 8:31 [PATCH 0/5] Support ASID Isolation mechanism Yunfeng Ye
2022-10-17 8:31 ` [PATCH 1/5] arm64: mm: Define asid_bitmap structure for pinned_asid Yunfeng Ye
2022-10-17 8:32 ` [PATCH 2/5] arm64: mm: Extract the processing of asid_generation Yunfeng Ye
2022-10-17 8:32 ` [PATCH 3/5] arm64: mm: Use cpumask in flush_context() Yunfeng Ye
2022-10-17 8:32 ` [PATCH 4/5] arm64: mm: Support ASID isolation feature Yunfeng Ye
2022-11-09 12:43 ` Catalin Marinas [this message]
2022-11-10 7:07 ` Yunfeng Ye
2022-11-28 17:00 ` Catalin Marinas
2022-11-29 12:26 ` Yunfeng Ye
2022-10-17 8:32 ` [PATCH 5/5] arm64: mm: Add TLB flush trace on context switch Yunfeng Ye
-- strict thread matches above, loose matches on Subject: below --
2022-10-17 8:12 [PATCH 0/5] Support ASID Isolation mechanism y00318929
2022-10-17 8:12 ` [PATCH 4/5] arm64: mm: Support ASID isolation feature y00318929
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