From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34F6BC433B4 for ; Tue, 6 Apr 2021 20:09:27 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A04A7613CC for ; Tue, 6 Apr 2021 20:09:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A04A7613CC Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lunn.ch Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=HShyR2+4ehegKG7nYyA4dWHzY3gGsIeAEiDfmiMfbjI=; b=lZIn3kNGvcyCDay+ATPrvILq/ D7IvhuBdQWCVUu7bEXp20RJ/gF+rntag5vBwGKW60RyMkMhOtC5PNiud9r0NdowQ/o6ofaLgCLq0i JpI4sBEsyyPBcI4ooU9WRYfkPYxAWLriQ15KkDnGbZ04VnE4b9vriwUT9izS13CWjsTbWHYaVYYyf bYCfCcBVOIc3yR9xnHHIuwHWo0K/mDAh5EwjSFBf3zoeOQs0FsGJuHDpxE3TatgrO/AStvo9x+st3 IgsuNVrFI6Tsh+JucHRLnsNDCxUwL1/FAQLo099uipX/KRTdvsiC/ghTxcKx6OifdklTA3v7P/CDs 0F/090mlQ==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lTryI-003NN1-Sa; Tue, 06 Apr 2021 20:06:47 +0000 Received: from vps0.lunn.ch ([185.16.172.187]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lTryC-003NMW-HQ for linux-arm-kernel@lists.infradead.org; Tue, 06 Apr 2021 20:06:43 +0000 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1lTrxn-00FB5Q-Mq; Tue, 06 Apr 2021 22:06:15 +0200 Date: Tue, 6 Apr 2021 22:06:15 +0200 From: Andrew Lunn To: "Voon, Weifeng" Cc: "Sit, Michael Wei Hong" , "peppe.cavallaro@st.com" , "alexandre.torgue@st.com" , "joabreu@synopsys.com" , "davem@davemloft.net" , "kuba@kernel.org" , "mcoquelin.stm32@gmail.com" , "linux@armlinux.org.uk" , "Ong, Boon Leong" , "qiangqing.zhang@nxp.com" , "Wong, Vee Khee" , "fugang.duan@nxp.com" , "Chuah, Kim Tatt" , "netdev@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "hkallweit1@gmail.com" Subject: Re: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac Message-ID: References: <20210405112953.26008-1-michael.wei.hong.sit@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210406_210640_751857_F6A68361 X-CRM114-Status: GOOD ( 14.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org > The limitation is not on the MAC, PCS or the PHY. For Intel mgbe, the > overclocking of 2.5 times clock rate to support 2.5G is only able to be > configured in the BIOS during boot time. Kernel driver has no access to > modify the clock rate for 1Gbps/2.5G mode. The way to determined the > current 1G/2.5G mode is by reading a dedicated adhoc register through mdio bus. > In short, after the system boot up, it is either in 1G mode or 2.5G mode > which not able to be changed on the fly. Right. It would of been a lot easier if this was in the commit message from the beginning. Please ensure the next version does say this. > Since the stmmac MAC can pair with any PCS and PHY, I still prefer that we tie > this platform specific limitation with the of MAC. As stmmac does handle platform > specific config/limitation. So yes, this needs to be somewhere in the intel specific stmmac code, with a nice comment explaining what is going on. What PHY are you using? The Aquantia/Marvell multi-gige phy can do rate adaptation. So you could fix the MAC-PHY link to 2500BaseX, and let the PHY internally handle the different line speeds. Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel