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Fri, 28 May 2021 10:03:56 -0700 (PDT) Date: Fri, 28 May 2021 19:05:28 +0200 From: Thierry Reding To: Will Deacon , Robin Murphy , Joerg Roedel , Krzysztof Kozlowski Subject: Re: [PATCH v2 00/10] arm64: tegra: Prevent early SMMU faults Message-ID: References: <20210420172619.3782831-1-thierry.reding@gmail.com> MIME-Version: 1.0 In-Reply-To: <20210420172619.3782831-1-thierry.reding@gmail.com> User-Agent: Mutt/2.0.6 (98f8cb83) (2021-03-06) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210528_100400_083217_ED88874B X-CRM114-Status: GOOD ( 35.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: iommu@lists.linux-foundation.org, Jon Hunter , Nicolin Chen , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: multipart/mixed; boundary="===============6303032858741916165==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============6303032858741916165== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="dbXO9L0VPFIC9kST" Content-Disposition: inline --dbXO9L0VPFIC9kST Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Apr 20, 2021 at 07:26:09PM +0200, Thierry Reding wrote: > From: Thierry Reding >=20 > Hi, >=20 > this is a set of patches that is the result of earlier discussions > regarding early identity mappings that are needed to avoid SMMU faults > during early boot. >=20 > The goal here is to avoid early identity mappings altogether and instead > postpone the need for the identity mappings to when devices are attached > to the SMMU. This works by making the SMMU driver coordinate with the > memory controller driver on when to start enforcing SMMU translations. > This makes Tegra behave in a more standard way and pushes the code to > deal with the Tegra-specific programming into the NVIDIA SMMU > implementation. >=20 > Compared to the original version of these patches, I've split the > preparatory work into a separate patch series because it became very > large and will be mostly uninteresting for this audience. >=20 > Patch 1 provides a mechanism to program SID overrides at runtime. Patch > 2 updates the ARM SMMU device tree bindings to include the Tegra186 > compatible string as suggested by Robin during review. >=20 > Patches 3 and 4 create the fundamentals in the SMMU driver to support > this and also make this functionality available on Tegra186. Patch 5 > hooks the ARM SMMU up to the memory controller so that the memory client > stream ID overrides can be programmed at the right time. >=20 > Patch 6 extends this mechanism to Tegra186 and patches 7-9 enable all of > this through device tree updates. Patch 10 is included here to show how > SMMU will be enabled for display controllers. However, it cannot be > applied yet because the code to create identity mappings for potentially > live framebuffers hasn't been merged yet. >=20 > The end result is that various peripherals will have SMMU enabled, while > the display controllers will keep using passthrough, as initially set up > by firmware. Once the device tree bindings have been accepted and the > SMMU driver has been updated to create identity mappings for the display > controllers, they can be hooked up to the SMMU and the code in this > series will automatically program the SID overrides to enable SMMU > translations at the right time. >=20 > Note that the series creates a compile time dependency between the > memory controller and IOMMU trees. If it helps I can provide a branch > for each tree, modelling the dependency, once the series has been > reviewed. >=20 > Changes in v2: > - split off the preparatory work into a separate series (that needs to > be applied first) > - address review comments by Robin >=20 > Thierry >=20 > Thierry Reding (10): > memory: tegra: Implement SID override programming > dt-bindings: arm-smmu: Add Tegra186 compatible string > iommu/arm-smmu: Implement ->probe_finalize() > iommu/arm-smmu: tegra: Detect number of instances at runtime > iommu/arm-smmu: tegra: Implement SID override programming > iommu/arm-smmu: Use Tegra implementation on Tegra186 > arm64: tegra: Use correct compatible string for Tegra186 SMMU > arm64: tegra: Hook up memory controller to SMMU on Tegra186 > arm64: tegra: Enable SMMU support on Tegra194 > arm64: tegra: Enable SMMU support for display on Tegra194 >=20 > .../devicetree/bindings/iommu/arm,smmu.yaml | 11 +- > arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 +- > arch/arm64/boot/dts/nvidia/tegra194.dtsi | 166 ++++++++++++++++++ > drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 3 +- > drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c | 90 ++++++++-- > drivers/iommu/arm/arm-smmu/arm-smmu.c | 13 ++ > drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 + > drivers/memory/tegra/mc.c | 9 + > drivers/memory/tegra/tegra186.c | 72 ++++++++ > include/soc/tegra/mc.h | 3 + > 10 files changed, 349 insertions(+), 23 deletions(-) Will, Robin, do you have any more comments on the ARM SMMU bits of this series? If not, can you guys provide an Acked-by so that Krzysztof can pick this (modulo the DT patches) up into the memory-controller tree for v5.14? I'll send out a v3 with the bisectibilitiy fix that Krishna pointed out. Thanks, Thierry --dbXO9L0VPFIC9kST Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmCxItYACgkQ3SOs138+ s6EDOBAAwOiGOvTRsOL0/TG+ekj2Qy8EtKdkYVeeHYkYzILZEbzntRj67AJ3MyWc Qz+08dicUEwFlehcUGCX1iltXX61eTLLxWATt14ogx2QWJMQ8MLAqbEifYpm1Q3g YqO7p/7l6y0F7Ah//pbROLvhHdQfIjbzypfpyzVRV4eyo8MVjttvOVymxYyekIHS 5WT0lHXOxmOZBemH6bK66tdIceIZ/TEGSy6sI9a7fo1KSJRC8UyAvlUb2eG2WIgI KbsIunQUbT7jZx0bLTGVD5xJpcuZURgm+KkN0Y1cfRPP3XVlHWsotPH8O2G1Vqbb Ul5aQYHunYKOXRq4YxhtpTWCmg38ZsNjT941VvVqpZlUHHnHdPAIoV+e6B5Z/ZMk tVmWhG91uoGOiCp/KJZ+kc8E7TxkpYtw+HzdW1nQEVhlCJ6Lcjjp7vQdmuWb54/l 5/ql3ep8u2Ycj0SBcuUMsfCZPoJwvysnlY5DswqHI1i5UslQ8FPBxH3pkNyERKZp b/pmkMN+RjKezyD6Y6LULATQG6Dif5Hrb7uIXOcMnhcDuFhb11Vf7MuXQwe4K+Ok MTqVgNWNo0kIMDNMZXraN3+k24R0MFBBOoLAY/bMeNDxXknCpqxWky6ouQbRalf+ nc3IEDIy7U/mgb4HvI+25P1WIArtLpA9ZKbhUYmahdMlbkn77ww= =bqed -----END PGP SIGNATURE----- --dbXO9L0VPFIC9kST-- --===============6303032858741916165== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============6303032858741916165==--