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Fri, 03 Sep 2021 11:07:28 +0000 Received: by quaco.ghostprotocols.net (Postfix, from userid 1000) id D05C74007E; Fri, 3 Sep 2021 08:07:25 -0300 (-03) Date: Fri, 3 Sep 2021 08:07:25 -0300 From: Arnaldo Carvalho de Melo To: Suzuki K Poulose Cc: James Clark , mathieu.poirier@linaro.org, leo.yan@linaro.org, coresight@lists.linaro.org, linux-perf-users@vger.kernel.org, mike.leach@linaro.org, John Garry , Will Deacon , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/9] perf cs-etm: Initialise architecture based on TRCIDR1 Message-ID: References: <20210806134109.1182235-1-james.clark@arm.com> <20210806134109.1182235-3-james.clark@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Url: http://acmel.wordpress.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Em Fri, Sep 03, 2021 at 09:55:37AM +0100, Suzuki K Poulose escreveu: > On 06/08/2021 14:41, James Clark wrote: > > Currently the architecture is hard coded as ARCH_V8, but from ETMv4.4 > > onwards this should be ARCH_AA64. > > > > Signed-off-by: James Clark > > --- > > tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 16 +++++++++++++++- > > 1 file changed, 15 insertions(+), 1 deletion(-) > > > > diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > > index 187c038caa19..787b19642e78 100644 > > --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > > +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > > @@ -126,6 +126,20 @@ static int cs_etm_decoder__gen_etmv3_config(struct cs_etm_trace_params *params, > > return 0; > > } > > +#define TRCIDR1_TRCARCHMIN_SHIFT 4 > > +#define TRCIDR1_TRCARCHMIN_MASK GENMASK(7, 4) > > +#define TRCIDR1_TRCARCHMIN(x) (((x) & TRCIDR1_TRCARCHMIN_MASK) >> TRCIDR1_TRCARCHMIN_SHIFT) > > minor nit: Please add a blank line here Fixed it > > +static enum _ocsd_arch_version cs_etm_decoder__get_etmv4_arch_ver(u32 reg_idr1) > > +{ > > + /* > > + * For ETMv4 if the trace minor version is 4 or more then we can assume > > + * the architecture is ARCH_AA64 rather than just V8. > > + * ARCH_V8 = V8 architecture > > + * ARCH_AA64 = Min v8r3 plus additional AA64 PE features > > Does this need to be >= 3 then, to be accurate ? > > The comment "reads", minimum v8.3 and any additional features. > > Otherwise looks good to me. Didn't have enough coffee, I think, can you please provide this as a patch? :) - Arnaldo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel