From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D98ABC433F5 for ; Tue, 15 Mar 2022 23:14:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=+MB+rpgZRy/wrOSgq1gS1yAxMHUMGL4J+1yPP1Up4wk=; b=eI5BPbLAftfBVC vBOEfDKT36CgrFlTURwsa/YJabWIpaWdeyo1tYWWRpid8V55t9BfqBw8f6yZoYdBkcAl19mVoI7Uh hTOnvDzk9nScMvHbijfFTOQpfUOSNHq9x9mXu40ybQRbmNbyulep4TM5IlSX+p4rJp6zrLOHDf2h7 bLW4ilZAtmXSj9r+bw+BKNRHy4sjjDUG5MArVulMb23JN4TXxlvZYbOZ8oqK53N0VLfwVJ4Q9k2RO Q8WtJB8M63T7hAhkjoujsmoZJdTFOptf6tluqeHdGOvzfWMjEx0qkDnB6uI59/4aofbJMJgEZ/0tQ t9vR7YOlurCtKeauR5RA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUGLx-00Asfi-QC; Tue, 15 Mar 2022 23:13:21 +0000 Received: from mail-io1-xd35.google.com ([2607:f8b0:4864:20::d35]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUGLs-00AsfC-65 for linux-arm-kernel@lists.infradead.org; Tue, 15 Mar 2022 23:13:19 +0000 Received: by mail-io1-xd35.google.com with SMTP id z7so584073iom.1 for ; Tue, 15 Mar 2022 16:13:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=mkSBqRczsdqseUzQVQ803PyalOUpJRNV22LE07GLzWA=; b=cJo1bjGbiKF7Q5JqUvCkE6Nkf4qZnP/YXbmZOuztmCDD8HTumQE7ewaddRkVQCR83P pQeSg8FS5hZk/OuVGcQAhKbB0YbVu4SApnVfjSXlfNhG1GRgHF9ryCJubxZtADrtURnx hM72J8DBoRlcO1tc8gu5fYAvW8R6HnbUij0JcjRajM5N40lT4/UUZjUF7ZP9nKljLC8A Gwecz7bHnWc5drxz0l/NIO14mo8tFmdzJcF0chQBspFakimTULUWCpgRU3fZsoOVTgrE II6/7rDMV66kRqVq4qA+tJM2m0hqYNL8kRwBKx1jQ+kf3EsIgzjc0GxCyDFZ4JUm5yhK fLag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=mkSBqRczsdqseUzQVQ803PyalOUpJRNV22LE07GLzWA=; b=OX6VMOxmVRhBPdeWQrxMXyC7j17unaL57XX6th6AeXpoeaddi/lc6Koej0vU7t9blj TFhMbAocCA7/PAIQrGUAwz+mb8KIDUjfVlqR8tBWuCJbfaNS2lKbZlKgyNTUdzW80tOT 4Snde2b/8tqulcyLx6+rNQhPZ223zgkmrv+9vFz6xizQrnhR5m+Tux6PXb+w9fLt5ydd 0uHsnjO0WSUbZeKmDDBqR89lrwJxxMHbQkePvqB6J5U0OAOmvKI30wKBzN1boQ6CcW2X NsYVrPYUbJivWj8VZ1zH+7RYy0xCvyXXh5vR7gYViATGCy/RRPKRE0R9ILngNgO1ywDv f00g== X-Gm-Message-State: AOAM53264LMPj+4RzmzB5MT6o5lICl1aDg0HvovwzNUgVu3B5qNCUewy uFVNs+Op+hsvUh6zNz5n4x4teQ== X-Google-Smtp-Source: ABdhPJxnLYPt8PSylbYInqqM86gCog/y/X9+CUSlxw7r1ZOrECfYR/o23iyqho8xxThyel1VGO6tjQ== X-Received: by 2002:a05:6638:d01:b0:31a:23d7:85d1 with SMTP id q1-20020a0566380d0100b0031a23d785d1mr1890548jaj.269.1647385992860; Tue, 15 Mar 2022 16:13:12 -0700 (PDT) Received: from google.com (194.225.68.34.bc.googleusercontent.com. [34.68.225.194]) by smtp.gmail.com with ESMTPSA id f1-20020a056e020b4100b002c68e176293sm247658ilu.87.2022.03.15.16.13.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Mar 2022 16:13:12 -0700 (PDT) Date: Tue, 15 Mar 2022 23:13:09 +0000 From: Oliver Upton To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, kernel-team@android.com, Andre Przywara Subject: Re: [PATCH 4/4] KVM: arm64: vgic-v3: Advertise GICR_CTLR.{IR, CES} as a new GICD_IIDR revision Message-ID: References: <20220314164044.772709-1-maz@kernel.org> <20220314164044.772709-5-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220314164044.772709-5-maz@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220315_161316_255433_9EF0EB7C X-CRM114-Status: GOOD ( 31.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marc, On Mon, Mar 14, 2022 at 04:40:44PM +0000, Marc Zyngier wrote: > Since adversising GICR_CTLR.{IC,CES} is directly observable from > a guest, we need to make it selectable from userspace. > > For that, bump the default GICD_IIDR revision and let userspace > downgrade it to the previous default. For GICv2, the two distributor > revisions are strictly equivalent. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/vgic/vgic-init.c | 7 ++++++- > arch/arm64/kvm/vgic/vgic-mmio-v2.c | 18 +++++++++++++++--- > arch/arm64/kvm/vgic/vgic-mmio-v3.c | 23 +++++++++++++++++++++-- > include/kvm/arm_vgic.h | 3 +++ > 4 files changed, 45 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/kvm/vgic/vgic-init.c b/arch/arm64/kvm/vgic/vgic-init.c > index fc00304fe7d8..f84e04f334c6 100644 > --- a/arch/arm64/kvm/vgic/vgic-init.c > +++ b/arch/arm64/kvm/vgic/vgic-init.c > @@ -319,7 +319,12 @@ int vgic_init(struct kvm *kvm) > > vgic_debug_init(kvm); > > - dist->implementation_rev = 2; > + /* > + * If userspace didn't set the GIC implementation revision, > + * default to the latest and greatest. You know want it. > + */ > + if (!dist->implementation_rev) > + dist->implementation_rev = KVM_VGIC_IMP_REV_LATEST; > dist->initialized = true; > > out: > diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v2.c b/arch/arm64/kvm/vgic/vgic-mmio-v2.c > index 12e4c223e6b8..f2246c4ca812 100644 > --- a/arch/arm64/kvm/vgic/vgic-mmio-v2.c > +++ b/arch/arm64/kvm/vgic/vgic-mmio-v2.c > @@ -73,9 +73,13 @@ static int vgic_mmio_uaccess_write_v2_misc(struct kvm_vcpu *vcpu, > gpa_t addr, unsigned int len, > unsigned long val) > { > + struct vgic_dist *dist = &vcpu->kvm->arch.vgic; > + u32 reg; > + > switch (addr & 0x0c) { > case GIC_DIST_IIDR: > - if (val != vgic_mmio_read_v2_misc(vcpu, addr, len)) > + reg = vgic_mmio_read_v2_misc(vcpu, addr, len); > + if ((reg ^ val) & ~GICD_IIDR_REVISION_MASK) > return -EINVAL; > > /* > @@ -87,8 +91,16 @@ static int vgic_mmio_uaccess_write_v2_misc(struct kvm_vcpu *vcpu, > * migration from old kernels to new kernels with legacy > * userspace. > */ > - vcpu->kvm->arch.vgic.v2_groups_user_writable = true; > - return 0; > + reg = FIELD_GET(GICD_IIDR_REVISION_MASK, reg); > + switch (reg) { > + case KVM_VGIC_IMP_REV_2: > + case KVM_VGIC_IMP_REV_3: > + dist->v2_groups_user_writable = true; Could you eliminate this bool and just pivot off of the implementation version? > + dist->implementation_rev = reg; > + return 0; > + default: > + return -EINVAL; > + } > } > > vgic_mmio_write_v2_misc(vcpu, addr, len, val); > diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v3.c b/arch/arm64/kvm/vgic/vgic-mmio-v3.c > index a6be403996c6..4c8e4f83e3d1 100644 > --- a/arch/arm64/kvm/vgic/vgic-mmio-v3.c > +++ b/arch/arm64/kvm/vgic/vgic-mmio-v3.c > @@ -155,13 +155,27 @@ static int vgic_mmio_uaccess_write_v3_misc(struct kvm_vcpu *vcpu, > unsigned long val) > { > struct vgic_dist *dist = &vcpu->kvm->arch.vgic; > + u32 reg; > > switch (addr & 0x0c) { > case GICD_TYPER2: > - case GICD_IIDR: > if (val != vgic_mmio_read_v3_misc(vcpu, addr, len)) > return -EINVAL; > return 0; > + case GICD_IIDR: > + reg = vgic_mmio_read_v3_misc(vcpu, addr, len); > + if ((reg ^ val) & ~GICD_IIDR_REVISION_MASK) > + return -EINVAL; > + > + reg = FIELD_GET(GICD_IIDR_REVISION_MASK, reg); > + switch (reg) { > + case KVM_VGIC_IMP_REV_2: > + case KVM_VGIC_IMP_REV_3: > + dist->implementation_rev = reg; > + return 0; > + default: > + return -EINVAL; > + } > case GICD_CTLR: > /* Not a GICv4.1? No HW SGIs */ > if (!kvm_vgic_global_state.has_gicv4_1) > @@ -232,8 +246,13 @@ static unsigned long vgic_mmio_read_v3r_ctlr(struct kvm_vcpu *vcpu, > gpa_t addr, unsigned int len) > { > struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; > + unsigned long val; > + > + val = atomic_read(&vgic_cpu->ctlr); > + if (vcpu->kvm->arch.vgic.implementation_rev >= KVM_VGIC_IMP_REV_3) That's a lot of indirection :) Could you make a helper for getting at the implementation revision from a vCPU pointer? > + val |= GICR_CTLR_IR | GICR_CTLR_CES; > > - return vgic_cpu->lpis_enabled ? GICR_CTLR_ENABLE_LPIS : 0; > + return val; > } > > static void vgic_mmio_write_v3r_ctlr(struct kvm_vcpu *vcpu, > diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h > index 401236f97cf2..2d8f2e90edc2 100644 > --- a/include/kvm/arm_vgic.h > +++ b/include/kvm/arm_vgic.h > @@ -231,6 +231,9 @@ struct vgic_dist { > > /* Implementation revision as reported in the GICD_IIDR */ > u32 implementation_rev; > +#define KVM_VGIC_IMP_REV_2 2 /* GICv2 restorable groups */ > +#define KVM_VGIC_IMP_REV_3 3 /* GICv3 GICR_CTLR.{IW,CES,RWP} */ > +#define KVM_VGIC_IMP_REV_LATEST KVM_VGIC_IMP_REV_3 > > /* Userspace can write to GICv2 IGROUPR */ > bool v2_groups_user_writable; > -- > 2.34.1 > > _______________________________________________ > kvmarm mailing list > kvmarm@lists.cs.columbia.edu > https://lists.cs.columbia.edu/mailman/listinfo/kvmarm _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel