From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C961C433EF for ; Wed, 23 Mar 2022 17:59:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=FI7iyVLOFlrqCBfrHjAKczQl8pldmV2/N5gVCGiAeS0=; b=VsnQQHlXeDGHw0 JJv+oXffDf6LNamHkn2N31GJr7P9rTR9qbAellO+3/gOjRD3YP3jCiJr4xv/Dv4AKgG0AlRYsL+rW tSEfXUg+yehHsyXKLlQVnB9G4qZTrbt6FdsAW3EnmYP2RsuJoyyDkDJ/xhaHh4BarmXUEW/oLPCa3 GqMySMgo7AkFYyR7vQLNzHngoSmadSmNREIuR5kjJZZOdtACJ3DuFoWeT+jLYBQO9Yft45FE70pye L8I6QAWF1uzZhZWAThCURtCmREyFfw6EjJdi59h8FWUZcuXbZ8MtBQuQWiMn4LS2QwBe6y9Kqn1Zo XObk3GPoPEU5IVkKI8Og==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nX5Fl-00EWeQ-M8; Wed, 23 Mar 2022 17:58:37 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nX5Fi-00EWe0-3c for linux-arm-kernel@lists.infradead.org; Wed, 23 Mar 2022 17:58:35 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7DD84D6E; Wed, 23 Mar 2022 10:58:32 -0700 (PDT) Received: from lakrids (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9FBC53F73B; Wed, 23 Mar 2022 10:58:31 -0700 (PDT) Date: Wed, 23 Mar 2022 17:58:25 +0000 From: Mark Rutland To: Mark Brown Cc: Catalin Marinas , Will Deacon , Marc Zyngier , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 4/9] arm64/sysreg: Provide a helper macro for defining sysreg bitmasks Message-ID: References: <20220316170849.1183941-1-broonie@kernel.org> <20220316170849.1183941-5-broonie@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220316170849.1183941-5-broonie@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220323_105834_221849_1376F7A5 X-CRM114-Status: GOOD ( 20.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Mar 16, 2022 at 05:08:44PM +0000, Mark Brown wrote: > To ease the generation of headers for the bitfields in the system registers > provide a macro for defining bitfields based on the top and bottom bit. > > Ideally this should be provided along with the generic BIT() macros however > there are a bunch of existing places with such macros including some that > actually call their macro BITMASK() so rather than create a dependency on > a wider cleanup let's define something local for now, this can be improved > later. This also sidesteps the need to consider types other than u64. In we have GENMASK() and GENMASK_ULL() for this. Is there a problem using those? I think I got confused as to the name in the original version of the scripting patch, and used BITMASK() by accident rather than by design, but I could be mistaken. Sorry about that! Thanks, Mark. > > Signed-off-by: Mark Brown > --- > arch/arm64/include/asm/sysreg.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index abb1e0502e28..fa2ae02de465 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -15,6 +15,8 @@ > > #include > > +#define ARM64_SYSREG_BITMASK(h, l) ((BIT(ULL(h)) - BIT(ULL(l))) | BIT(ULL(h))) > + > /* > * ARMv8 ARM reserves the following encoding for system registers: > * (Ref: ARMv8 ARM, Section: "System instruction class encoding overview", > -- > 2.30.2 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel