From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9AB55C433F5 for ; Thu, 12 May 2022 17:12:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hPRCv9+z4/AmjRseAwCdlWfrkWBO4ObHMRwEPczS9Ks=; b=oDIpyY1J1b21y6 krd3sGiRLsEw32ssTj28hSJ5isZ9xfGC3b+k2xsOQnaFdtnaz39nyTdkezavH9FnZhq4324z5iBAs L5nZRNPulifB7/2FRIYFkXSSqL/20LUxSJeLmHwfh8shE4RjepkdFXwR2FfNMIVxgWxSBnZ4UmY2d bQR546UFBODv2oBYvvo2O/DWp2w+jHcFIGEfkSUtgblUs8bYhdi/M2ynhUtXo1s/aBwneR17LsnbQ iL0BBv++ORTuMll5JyYPyvO847zgvNgzGd3f/Suwgs0q4yVqvJ+jBwwfLWlbP8jSMTsrOeFIl1CEn XK6Y0iCMKVMKUa6iI5Ng==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1npCL7-00CvDO-Rz; Thu, 12 May 2022 17:11:01 +0000 Received: from mga18.intel.com ([134.134.136.126]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1npCL4-00CvCw-8w for linux-arm-kernel@lists.infradead.org; Thu, 12 May 2022 17:10:59 +0000 X-IronPort-AV: E=McAfee;i="6400,9594,10345"; a="252120845" X-IronPort-AV: E=Sophos;i="5.91,220,1647327600"; d="scan'208";a="252120845" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2022 10:08:38 -0700 X-IronPort-AV: E=Sophos;i="5.91,220,1647327600"; d="scan'208";a="658684239" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2022 10:08:32 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.95) (envelope-from ) id 1npCIe-00FHkY-Cq; Thu, 12 May 2022 20:08:28 +0300 Date: Thu, 12 May 2022 20:08:28 +0300 From: Andy Shevchenko To: Marc Zyngier Cc: linux-kernel@vger.kernel.org, Linus Walleij , Bartosz Golaszewski , Thierry Reding , Joey Gouly , Jonathan Hunter , Hector Martin , Sven Peter , Alyssa Rosenzweig , Bjorn Andersson , Andy Gross , Jeffrey Hugo , Thomas Gleixner , Basavaraj Natikar , Shyam Sundar S K , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, kernel-team@android.com Subject: Re: [PATCH v3 00/10] gpiolib: Handle immutable irq_chip structures Message-ID: References: <20220419141846.598305-1-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220419141846.598305-1-maz@kernel.org> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220512_101058_570277_A9E320C6 X-CRM114-Status: GOOD ( 27.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Apr 19, 2022 at 03:18:36PM +0100, Marc Zyngier wrote: > This is a followup from [2]. > > I recently realised that the gpiolib play ugly tricks on the > unsuspecting irq_chip structures by patching the callbacks. > > Not only this breaks when an irq_chip structure is made const (which > really should be the default case), but it also forces this structure > to be copied at nauseam for each instance of the GPIO block, which is > a waste of memory. Is this brings us to the issue with IRQ chip name? The use case in my mind is the following: 1) we have two or more GPIO chips that supports IRQ; 2) the user registers two IRQs of the same (by number) pin on different chips; 3) cat /proc/interrupt will show 'my_gpio_chip XX', where XX is the number. So, do I understand correct current state of affairs? If so, we have to fix this to have any kind of ID added to the chip name that we can map /proc/interrupts output correctly. > My current approach is to add a new irq_chip flag (IRQCHIP_IMMUTABLE) > which does what it says on the tin: don't you dare writing to them. > Gpiolib is further updated not to install its own callbacks, and it > becomes the responsibility of the driver to call into the gpiolib when > required. This is similar to what we do for other subsystems such as > PCI-MSI. > > 5 drivers are updated to this new model: M1, QC, Tegra, pl061 and AMD > (as I actively use them) keeping a single irq_chip structure, marking > it const, and exposing the new flag. > > Nothing breaks, the volume of change is small, the memory usage goes > down and we have fewer callbacks that can be used as attack vectors. > What's not to love? > > Since there wasn't any objection in the previous round of review, I'm > going to take this series into -next to see if anything breaks at > scale. -- With Best Regards, Andy Shevchenko _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel