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From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Cc: Andy Gross <agross@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Alex Elder <elder@ieee.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org,
	Sai Prakash Ranjan <quic_saipraka@quicinc.com>,
	Sibi Sankar <quic_sibis@quicinc.com>,
	Rajendra Nayak <quic_rjendra@codeaurora.org>,
	vkoul@kernel.org
Subject: Re: [PATCH V7 2/7] soc: qcom: dcc:Add driver support for Data Capture and Compare unit(DCC)
Date: Tue, 3 May 2022 13:03:09 -0500	[thread overview]
Message-ID: <YnFuXYEXxLQkak24@builder.lan> (raw)
In-Reply-To: <bc8504bdaf24d98762e2dbad7d084ca247380f06.1646285069.git.quic_schowdhu@quicinc.com>

On Thu 03 Mar 00:27 CST 2022, Souradeep Chowdhury wrote:

> The DCC is a DMA Engine designed to capture and store data
> during system crash or software triggers. The DCC operates
> based on user inputs via the sysfs interface. The user gives
> addresses as inputs and these addresses are stored in the
> dcc sram. In case of a system crash or a manual software
> trigger by the user through the debugfs interface,
> the dcc captures and stores the values at these addresses.
> This patch contains the driver which has all the methods
> pertaining to the debugfs interface, auxiliary functions to
> support all the four fundamental operations of dcc namely
> read, write, read/modify/write and loop. The probe method
> here instantiates all the resources necessary for dcc to
> operate mainly the dedicated dcc sram where it stores the
> values. The DCC driver can be used for debugging purposes
> without going for a reboot since it can perform software
> triggers as well based on user inputs.
> 
> Also added the documentation for debugfs entries and explained
> the functionalities of each debugfs file that has been created
> for dcc.
> 
> The following is the justification of using debugfs interface
> over the other alternatives like sysfs/ioctls
> 
> i) As can be seen from the debugfs attribute descriptions,
> some of the debugfs attribute files here contains multiple
> arguments which needs to be accepted from the user. This goes
> against the design style of sysfs.
> 
> ii) The user input patterns have been made simple and convenient
> in this case with the use of debugfs interface as user doesn't
> need to shuffle between different files to execute one instruction
> as was the case on using other alternatives.
> 
> Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
> ---
>  Documentation/ABI/testing/debugfs-driver-dcc |  124 +++
>  drivers/soc/qcom/Kconfig                     |    8 +
>  drivers/soc/qcom/Makefile                    |    1 +
>  drivers/soc/qcom/dcc.c                       | 1465 ++++++++++++++++++++++++++
>  4 files changed, 1598 insertions(+)
>  create mode 100644 Documentation/ABI/testing/debugfs-driver-dcc
>  create mode 100644 drivers/soc/qcom/dcc.c
> 
> diff --git a/Documentation/ABI/testing/debugfs-driver-dcc b/Documentation/ABI/testing/debugfs-driver-dcc
> new file mode 100644
> index 0000000..70029ab
> --- /dev/null
> +++ b/Documentation/ABI/testing/debugfs-driver-dcc
> @@ -0,0 +1,124 @@
> +What:          /sys/kernel/debug/dcc/.../trigger
> +Date:          March 2022
> +Contact:       Souradeep Chowdhury <quic_schowdhu@quicinc.com>
> +Description:
> +		This is the debugfs interface for manual software
> +		triggers. The user can simply enter a 1 against
> +		the debugfs file and enable a manual trigger.
> +		Example:
> +		echo  1 > /sys/kernel/debug/dcc/.../trigger
> +
> +What:          /sys/kernel/debug/dcc/.../enable
> +Date:          March 2022
> +Contact:       Souradeep Chowdhury <quic_schowdhu@quicinc.com>
> +Description:
> +		This debugfs interface is used for enabling the
> +		the dcc hardware. On enabling the dcc, all the
> +		addresses entered by the user is written into
> +		dcc sram which is read by the dcc hardware on
> +		manual or crash induced triggers.
> +		Example:
> +		echo  0 > /sys/bus/platform/devices/.../enable
> +		(disable dcc)
> +		echo  1 > /sys/bus/platform/devices/.../enable
> +		(enable dcc)
> +
> +What:          /sys/kernel/debug/dcc/.../config_read

As mentioned last time, I don't like this interface of having 6 files
that the user can write to in order to append items in the currently
selected linked list.

Why can't this be a single "config" which takes a multiline string of
operations? (Bonus point for supporting appending to the list).


This would also serve as a natural place to dump the linked list back to
the user for inspection.

> +Date:          March 2022
> +Contact:       Souradeep Chowdhury <quic_schowdhu@quicinc.com>
> +Description:
> +		This stores the addresses of the registers which
> +		needs to be read in case of a hardware crash or
> +		manual software triggers. The address entered here
> +		are considered under read type instruction.
> +		Example:
> +		echo <1> <2> <3> >/sys/kernel/debug/dcc/../config_read
> +		1->Address to be considered for reading the value.
> +		2->The word count of the addresses, read n words
> +		   starting from address <1>.
> +		3->Can be a 1 or 0 which indicates if it is apb or ahb
> +		bus respectively.
> +
> +What:          /sys/kernel/debug/dcc/.../config_write
> +Date:          March 2022
> +Contact:       Souradeep Chowdhury <quic_schowdhu@quicinc.com>
> +Description:
> +		This file allows user to write a value to the register
> +		address given as argument. The reason for this feature
> +		of dcc is that for accessing certain registers it is
> +		necessary to set some bits of some other register.
> +		Example:
> +		echo <1> <2> <3> > /sys/bus/platform/devices/.../config_write
> +		1->Address to be considered for writing the value.
> +		2->The value that needs to be written at the location.
> +		3->Can be a 1 or 0 which indicates if it is apb or ahb
> +		bus respectively.
> +
> +What:          /sys/kernel/debug/dcc/.../config_reset
> +Date:          March 2022
> +Contact:       Souradeep Chowdhury <quic_schowdhu@quicinc.com>
> +Description:
> +		This file is used to reset the configuration of
> +		a dcc driver to the default configuration. This
> +		means that all the previous addresses stored in
> +		the driver gets removed and user needs to enter
> +		the address values from the start.
> +		Example:
> +		echo  1 > /sys/bus/platform/devices/.../config_reset
> +
> +What:          /sys/kernel/debug/dcc/.../config_loop
> +Date:		March 2022
> +Contact:       Souradeep Chowdhury <quic_schowdhu@quicinc.com>
> +Description:
> +		This file is used to enter the loop type addresses for
> +		dcc. DCC hardware provides feature to loop among multiple
> +		addresses. For debugging purposes register values need to
> +		be captured repeatedly in a loop. On giving the loop count
> +		as n, the value at address will be captured n times in a
> +		loop. At most 8 loop addresses can be configured at once.
> +		Example:
> +		echo <1> <2> <3> > /sys/kernel/debug/dcc/../config_loop
> +		1->The loop count, the number of times the value of the
> +		   addresses will be captured.
> +		2->The address count, total number of addresses to be
> +		   entered in this instruction.
> +		3->The series of addresses to be entered separated by a
> +		   space like <addr1> <addr2>... and so on.
> +
> +What:          /sys/kernel/debug/dcc/.../config_read_write
> +Date:          March 2022
> +Contact:       Souradeep Chowdhury <quic_schowdhu@quicinc.com>
> +Description:
> +		This file is used to read the value of the register
> +		and then write the value given as an argument to the
> +		register address. The address argument should be given
> +		of the form <addr> <mask> <value>.For debugging purposes
> +		sometimes we need to first read from a register and then
> +		set some values to the register.
> +		Example:
> +		echo <1> <2> <3> > /sys/kernel/debug/dcc/.../config_read_write
> +		1->The address which needs to be considered for read then write.
> +		2->The value that needs to be written on the address.
> +		3->The mask of the value to be written.
> +
> +What:		/sys/kernel/debug/dcc/.../ready
> +Date:		March 2022
> +Contact	Souradeep Chowdhury <quic_schowdhu@quicinc.com>
> +Description:
> +		This file is used to check the status of the dcc
> +		hardware if it's ready to take the inputs. A 0
> +		here indicates dcc is in a ready condition.
> +		Example:
> +		cat /sys/kernel/debug/dcc/.../ready
> +
> +What:		/sys/kernel/debug/dcc/.../curr_list

I still don't like the idea of having a single set of files to interface
with all N lists. I think you should discover how many lists you have
and create N directories of files, each on operating on a given list.

> +Date:		March 2022
> +Contact:	Souradeep Chowdhury <quic_schowdhu@quicinc.com>
> +Description:
> +		This attribute is used to enter the linklist to be
> +		used while appending addresses. The range of values
> +		for this is advertised either by a register or is
> +		predefined. Max value for this can be till 8.
> +		Example:
> +		echo 0 > /sys/kernel/debug/dcc/...curr_list
> +

Regards,
Bjorn

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  reply	other threads:[~2022-05-03 18:04 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-03  6:27 [PATCH V7 0/7] Add driver support for Data Capture and Compare Engine(DCC) for SM8150, SC7280, SC7180, SDM845 Souradeep Chowdhury
2022-03-03  6:27 ` [PATCH V7 1/7] dt-bindings: Added the yaml bindings for DCC Souradeep Chowdhury
2022-03-03  6:27 ` [PATCH V7 2/7] soc: qcom: dcc:Add driver support for Data Capture and Compare unit(DCC) Souradeep Chowdhury
2022-05-03 18:03   ` Bjorn Andersson [this message]
2022-05-05 12:53     ` Souradeep Chowdhury
2022-05-06  2:53       ` Bjorn Andersson
2022-05-16 10:32         ` Souradeep Chowdhury
2022-03-03  6:27 ` [PATCH V7 3/7] MAINTAINERS: Add the entry for DCC(Data Capture and Compare) driver support Souradeep Chowdhury
2022-05-03 18:04   ` Bjorn Andersson
2022-03-03  6:27 ` [PATCH V7 4/7] arm64: dts: qcom: sm8150: Add Data Capture and Compare(DCC) support node Souradeep Chowdhury
2022-03-03  6:27 ` [PATCH V7 5/7] arm64: dts: qcom: sc7280: " Souradeep Chowdhury
2022-03-03  6:27 ` [PATCH V7 6/7] arm64: dts: qcom: sc7180: " Souradeep Chowdhury
2022-03-03  6:27 ` [PATCH V7 7/7] arm64: dts: qcom: sdm845: " Souradeep Chowdhury
2022-04-19 11:58 ` [PATCH V7 0/7] Add driver support for Data Capture and Compare Engine(DCC) for SM8150,SC7280,SC7180,SDM845 Souradeep Chowdhury
2022-05-02 23:01 ` Trilok Soni

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