From: Catalin Marinas <catalin.marinas@arm.com>
To: James Clark <james.clark@arm.com>
Cc: suzuki.poulose@arm.com, coresight@lists.linaro.org,
mathieu.poirier@linaro.org, mike.leach@linaro.org,
leo.yan@linaro.org,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Mark Brown <broonie@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] coresight: Use new autogenerated sysreg definitions
Date: Tue, 20 Sep 2022 17:42:38 +0100 [thread overview]
Message-ID: <Yyntfsas+K63Oo1a@arm.com> (raw)
In-Reply-To: <20220920134827.31738-1-james.clark@arm.com>
On Tue, Sep 20, 2022 at 02:48:27PM +0100, James Clark wrote:
> Fix the build by updating registers to use the new autogenerated format.
>
> Fixes: c0357a73fa4a ("arm64/sysreg: Align field names in ID_AA64DFR0_EL1 with architecture")
> Signed-off-by: James Clark <james.clark@arm.com>
In general it's better to add the build error in the commit log. I'll
add one as I can reproduce it.
Since it's broken by the arm64 tree, I plan to add it to the same branch
(for-next/sysreg).
BTW, for some reason we don't have CoreSight enabled in defconfig, not
even as a module. Would you mind sending a patch for this and enable (as
modules) all the relevant drivers? We miss any test coverage here.
Thanks.
--
Catalin
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next prev parent reply other threads:[~2022-09-20 16:43 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-20 13:48 [PATCH] coresight: Use new autogenerated sysreg definitions James Clark
2022-09-20 16:42 ` Catalin Marinas [this message]
2022-09-20 17:07 ` Catalin Marinas
2022-09-20 17:56 ` Mark Brown
2022-09-20 18:08 ` Catalin Marinas
2022-09-20 18:48 ` Mark Brown
2022-09-20 19:11 ` Mark Brown
2022-09-21 8:21 ` Catalin Marinas
2022-09-20 18:34 ` Mark Brown
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