* [PATCH 0/7] Add I2S-MCC support for Microchip's SAMA7G5
@ 2021-02-23 18:19 Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 1/7] ASoC: convert Microchip I2SMCC binding to yaml Codrin Ciubotariu
` (6 more replies)
0 siblings, 7 replies; 10+ messages in thread
From: Codrin Ciubotariu @ 2021-02-23 18:19 UTC (permalink / raw)
To: alsa-devel, devicetree, linux-kernel, linux-arm-kernel
Cc: alexandre.belloni, lgirdwood, robh+dt, tiwai, ludovic.desroches,
broonie, Codrin Ciubotariu, perex
SAMA7G5 includes an updated version of I2S-MCC, found previously on
SAM9X60. This controller includes 8 data pins, 4 for playback and 4 for
capture. For I2S and LEFT_J formats, these pins can be used to
send/receive up to 8 audio channels. For DSP_A, with TDM, any pins pair
(DIN/DOUT) from these 4 can be selected to send/receive data. This
version also includes 2 FIFOs (send and receive).
This patch set starts by moving the driver's bindings to yaml and
continues with adding a new compatible for the SAMA7G5 variant, followed
by the changes needed for I2S/LEFT_J support, TDM pin pair selection and
FIFO support, exclusively for SAMA7G5.
Codrin Ciubotariu (7):
ASoC: convert Microchip I2SMCC binding to yaml
dt-bindings: mchp,i2s-mcc: Add SAMA7G5 to binding
ASoC: mchp-i2s-mcc: Add compatible for SAMA7G5
ASoC: mchp-i2s-mcc: Add multi-channel support for I2S and LEFT_J
formats
dt-bindings: mchp,i2s-mcc: Add property to specify pin pair for TDM
ASoC: mchp-i2s-mcc: Add support to select TDM pins
ASoC: mchp-i2s-mcc: Add FIFOs support
.../bindings/sound/mchp,i2s-mcc.yaml | 108 ++++++++++++
.../bindings/sound/mchp-i2s-mcc.txt | 43 -----
sound/soc/atmel/Kconfig | 3 +
sound/soc/atmel/mchp-i2s-mcc.c | 161 +++++++++++++++---
4 files changed, 252 insertions(+), 63 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
delete mode 100644 Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/7] ASoC: convert Microchip I2SMCC binding to yaml
2021-02-23 18:19 [PATCH 0/7] Add I2S-MCC support for Microchip's SAMA7G5 Codrin Ciubotariu
@ 2021-02-23 18:19 ` Codrin Ciubotariu
2021-03-01 13:59 ` Mark Brown
2021-02-23 18:19 ` [PATCH 2/7] dt-bindings: mchp,i2s-mcc: Add SAMA7G5 to binding Codrin Ciubotariu
` (5 subsequent siblings)
6 siblings, 1 reply; 10+ messages in thread
From: Codrin Ciubotariu @ 2021-02-23 18:19 UTC (permalink / raw)
To: alsa-devel, devicetree, linux-kernel, linux-arm-kernel
Cc: alexandre.belloni, lgirdwood, robh+dt, tiwai, ludovic.desroches,
broonie, Codrin Ciubotariu, perex
This patch converts the Microchip I2SMCC bindings to DT schema format
using json-schema.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
.../bindings/sound/mchp,i2s-mcc.yaml | 86 +++++++++++++++++++
.../bindings/sound/mchp-i2s-mcc.txt | 43 ----------
2 files changed, 86 insertions(+), 43 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
delete mode 100644 Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt
diff --git a/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml b/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
new file mode 100644
index 000000000000..79445f5f2804
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/mchp,i2s-mcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip I2S Multi-Channel Controller
+
+maintainers:
+ - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
+
+description:
+ The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
+ supports a Time Division Multiplexed (TDM) interface with external
+ multi-channel audio codecs. It consists of a receiver, a transmitter and a
+ common clock generator that can be enabled separately to provide Adapter,
+ Client or Controller modes with receiver and/or transmitter active.
+
+properties:
+ "#sound-dai-cells":
+ const: 0
+
+ compatible:
+ const: microchip,sam9x60-i2smcc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Peripheral Bus Clock
+ - description: Generic Clock (Optional). Should be set mostly when Master
+ Mode is required.
+ minItems: 1
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: gclk
+ minItems: 1
+
+ dmas:
+ items:
+ - description: TX DMA Channel
+ - description: RX DMA Channel
+
+ dma-names:
+ items:
+ - const: tx
+ - const: rx
+
+required:
+ - "#sound-dai-cells"
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - dmas
+ - dma-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/dma/at91.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ i2s@f001c000 {
+ #sound-dai-cells = <0>;
+ compatible = "microchip,sam9x60-i2smcc";
+ reg = <0xf001c000 0x100>;
+ interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
+ dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(36))>,
+ <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(37))>;
+ dma-names = "tx", "rx";
+ clocks = <&i2s_clk>, <&i2s_gclk>;
+ clock-names = "pclk", "gclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2s_default>;
+ };
diff --git a/Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt b/Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt
deleted file mode 100644
index 91ec83a6faed..000000000000
--- a/Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt
+++ /dev/null
@@ -1,43 +0,0 @@
-* Microchip I2S Multi-Channel Controller
-
-Required properties:
-- compatible: Should be "microchip,sam9x60-i2smcc".
-- reg: Should be the physical base address of the controller and the
- length of memory mapped region.
-- interrupts: Should contain the interrupt for the controller.
-- dmas: Should be one per channel name listed in the dma-names property,
- as described in atmel-dma.txt and dma.txt files.
-- dma-names: Identifier string for each DMA request line in the dmas property.
- Two dmas have to be defined, "tx" and "rx".
-- clocks: Must contain an entry for each entry in clock-names.
- Please refer to clock-bindings.txt.
-- clock-names: Should be one of each entry matching the clocks phandles list:
- - "pclk" (peripheral clock) Required.
- - "gclk" (generated clock) Optional (1).
-
-Optional properties:
-- pinctrl-0: Should specify pin control groups used for this controller.
-- princtrl-names: Should contain only one value - "default".
-
-
-(1) : Only the peripheral clock is required. The generated clock is optional
- and should be set mostly when Master Mode is required.
-
-Example:
-
- i2s@f001c000 {
- compatible = "microchip,sam9x60-i2smcc";
- reg = <0xf001c000 0x100>;
- interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
- dmas = <&dma0
- (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
- AT91_XDMAC_DT_PERID(36))>,
- <&dma0
- (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
- AT91_XDMAC_DT_PERID(37))>;
- dma-names = "tx", "rx";
- clocks = <&i2s_clk>, <&i2s_gclk>;
- clock-names = "pclk", "gclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2s_default>;
- };
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/7] dt-bindings: mchp,i2s-mcc: Add SAMA7G5 to binding
2021-02-23 18:19 [PATCH 0/7] Add I2S-MCC support for Microchip's SAMA7G5 Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 1/7] ASoC: convert Microchip I2SMCC binding to yaml Codrin Ciubotariu
@ 2021-02-23 18:19 ` Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 3/7] ASoC: mchp-i2s-mcc: Add compatible for SAMA7G5 Codrin Ciubotariu
` (4 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Codrin Ciubotariu @ 2021-02-23 18:19 UTC (permalink / raw)
To: alsa-devel, devicetree, linux-kernel, linux-arm-kernel
Cc: alexandre.belloni, lgirdwood, robh+dt, tiwai, ludovic.desroches,
broonie, Codrin Ciubotariu, perex
SAMA7G5 includes an updated version of the I2S-MCC driver, that includes
3 more DIN/DOUT pin pairs for multi-channel.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml b/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
index 79445f5f2804..a8a73f3ed473 100644
--- a/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
+++ b/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
@@ -15,13 +15,18 @@ description:
multi-channel audio codecs. It consists of a receiver, a transmitter and a
common clock generator that can be enabled separately to provide Adapter,
Client or Controller modes with receiver and/or transmitter active.
+ On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S
+ multi-channel is supported by using multiple data pins, output and
+ input, without TDM.
properties:
"#sound-dai-cells":
const: 0
compatible:
- const: microchip,sam9x60-i2smcc
+ enum:
+ - microchip,sam9x60-i2smcc
+ - microchip,sama7g5-i2smcc
reg:
maxItems: 1
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/7] ASoC: mchp-i2s-mcc: Add compatible for SAMA7G5
2021-02-23 18:19 [PATCH 0/7] Add I2S-MCC support for Microchip's SAMA7G5 Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 1/7] ASoC: convert Microchip I2SMCC binding to yaml Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 2/7] dt-bindings: mchp,i2s-mcc: Add SAMA7G5 to binding Codrin Ciubotariu
@ 2021-02-23 18:19 ` Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 4/7] ASoC: mchp-i2s-mcc: Add multi-channel support for I2S and LEFT_J formats Codrin Ciubotariu
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Codrin Ciubotariu @ 2021-02-23 18:19 UTC (permalink / raw)
To: alsa-devel, devicetree, linux-kernel, linux-arm-kernel
Cc: alexandre.belloni, lgirdwood, robh+dt, tiwai, ludovic.desroches,
broonie, Codrin Ciubotariu, perex
Microchip's new SAMA7G5 includes an updated I2S-MCC compatible with the
previous version found on SAM9X60. The new controller includes 8 (4 * 2)
input and output data pins for up to 8 channels for I2S and Left-Justified
formats.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
sound/soc/atmel/Kconfig | 3 +++
sound/soc/atmel/mchp-i2s-mcc.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/sound/soc/atmel/Kconfig b/sound/soc/atmel/Kconfig
index 9fe9471f4514..ec04e3386bc0 100644
--- a/sound/soc/atmel/Kconfig
+++ b/sound/soc/atmel/Kconfig
@@ -127,10 +127,13 @@ config SND_MCHP_SOC_I2S_MCC
Say Y or M if you want to add support for I2S Multi-Channel ASoC
driver on the following Microchip platforms:
- sam9x60
+ - sama7g5
The I2SMCC complies with the Inter-IC Sound (I2S) bus specification
and supports a Time Division Multiplexed (TDM) interface with
external multi-channel audio codecs.
+ Starting with sama7g5, I2S and Left-Justified multi-channel is
+ supported by using multiple data pins, output and input, without TDM.
config SND_MCHP_SOC_SPDIFTX
tristate "Microchip ASoC driver for boards using S/PDIF TX"
diff --git a/sound/soc/atmel/mchp-i2s-mcc.c b/sound/soc/atmel/mchp-i2s-mcc.c
index 6d5ae18f8b38..0ee01383e307 100644
--- a/sound/soc/atmel/mchp-i2s-mcc.c
+++ b/sound/soc/atmel/mchp-i2s-mcc.c
@@ -873,6 +873,9 @@ static const struct of_device_id mchp_i2s_mcc_dt_ids[] = {
{
.compatible = "microchip,sam9x60-i2smcc",
},
+ {
+ .compatible = "microchip,sama7g5-i2smcc",
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mchp_i2s_mcc_dt_ids);
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 4/7] ASoC: mchp-i2s-mcc: Add multi-channel support for I2S and LEFT_J formats
2021-02-23 18:19 [PATCH 0/7] Add I2S-MCC support for Microchip's SAMA7G5 Codrin Ciubotariu
` (2 preceding siblings ...)
2021-02-23 18:19 ` [PATCH 3/7] ASoC: mchp-i2s-mcc: Add compatible for SAMA7G5 Codrin Ciubotariu
@ 2021-02-23 18:19 ` Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 5/7] dt-bindings: mchp, i2s-mcc: Add property to specify pin pair for TDM Codrin Ciubotariu
` (2 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Codrin Ciubotariu @ 2021-02-23 18:19 UTC (permalink / raw)
To: alsa-devel, devicetree, linux-kernel, linux-arm-kernel
Cc: alexandre.belloni, lgirdwood, robh+dt, tiwai, ludovic.desroches,
broonie, Codrin Ciubotariu, perex
The latest I2S-MCC available in SAMA7G5 supports multi-channel for I2S and
Left-Justified formats. For this, the new version uses 8 (4 * 2) input and
output pins, with each pin being responsible for 2 channels. This sums up
to a total of 8 channels for synchronous capture and playback.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
sound/soc/atmel/mchp-i2s-mcc.c | 38 ++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/sound/soc/atmel/mchp-i2s-mcc.c b/sound/soc/atmel/mchp-i2s-mcc.c
index 0ee01383e307..52d3f43148dc 100644
--- a/sound/soc/atmel/mchp-i2s-mcc.c
+++ b/sound/soc/atmel/mchp-i2s-mcc.c
@@ -16,6 +16,7 @@
#include <linux/clk.h>
#include <linux/mfd/syscon.h>
#include <linux/lcm.h>
+#include <linux/of_device.h>
#include <sound/core.h>
#include <sound/pcm.h>
@@ -225,6 +226,10 @@ static const struct regmap_config mchp_i2s_mcc_regmap_config = {
.max_register = MCHP_I2SMCC_VERSION,
};
+struct mchp_i2s_mcc_soc_data {
+ unsigned int data_pin_pair_num;
+};
+
struct mchp_i2s_mcc_dev {
struct wait_queue_head wq_txrdy;
struct wait_queue_head wq_rxrdy;
@@ -232,6 +237,7 @@ struct mchp_i2s_mcc_dev {
struct regmap *regmap;
struct clk *pclk;
struct clk *gclk;
+ const struct mchp_i2s_mcc_soc_data *soc;
struct snd_dmaengine_dai_dma_data playback;
struct snd_dmaengine_dai_dma_data capture;
unsigned int fmt;
@@ -549,6 +555,17 @@ static int mchp_i2s_mcc_hw_params(struct snd_pcm_substream *substream,
}
if (dev->fmt & (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J)) {
+ /* for I2S and LEFT_J one pin is needed for every 2 channels */
+ if (channels > dev->soc->data_pin_pair_num * 2) {
+ dev_err(dev->dev,
+ "unsupported number of audio channels: %d\n",
+ channels);
+ return -EINVAL;
+ }
+
+ /* enable for interleaved format */
+ mrb |= MCHP_I2SMCC_MRB_CRAMODE_REGULAR;
+
switch (channels) {
case 1:
if (is_playback)
@@ -558,6 +575,12 @@ static int mchp_i2s_mcc_hw_params(struct snd_pcm_substream *substream,
break;
case 2:
break;
+ case 4:
+ mra |= MCHP_I2SMCC_MRA_WIRECFG_I2S_2_TDM_1;
+ break;
+ case 8:
+ mra |= MCHP_I2SMCC_MRA_WIRECFG_I2S_4_TDM_2;
+ break;
default:
dev_err(dev->dev, "unsupported number of audio channels\n");
return -EINVAL;
@@ -869,12 +892,22 @@ static const struct snd_soc_component_driver mchp_i2s_mcc_component = {
};
#ifdef CONFIG_OF
+static struct mchp_i2s_mcc_soc_data mchp_i2s_mcc_sam9x60 = {
+ .data_pin_pair_num = 1,
+};
+
+static struct mchp_i2s_mcc_soc_data mchp_i2s_mcc_sama7g5 = {
+ .data_pin_pair_num = 4,
+};
+
static const struct of_device_id mchp_i2s_mcc_dt_ids[] = {
{
.compatible = "microchip,sam9x60-i2smcc",
+ .data = &mchp_i2s_mcc_sam9x60,
},
{
.compatible = "microchip,sama7g5-i2smcc",
+ .data = &mchp_i2s_mcc_sama7g5,
},
{ /* sentinel */ }
};
@@ -932,6 +965,11 @@ static int mchp_i2s_mcc_probe(struct platform_device *pdev)
dev->gclk = NULL;
}
+ dev->soc = of_device_get_match_data(&pdev->dev);
+ if (!dev->soc) {
+ dev_err(&pdev->dev, "failed to get soc data\n");
+ return -ENODEV;
+ }
dev->dev = &pdev->dev;
dev->regmap = regmap;
platform_set_drvdata(pdev, dev);
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 5/7] dt-bindings: mchp, i2s-mcc: Add property to specify pin pair for TDM
2021-02-23 18:19 [PATCH 0/7] Add I2S-MCC support for Microchip's SAMA7G5 Codrin Ciubotariu
` (3 preceding siblings ...)
2021-02-23 18:19 ` [PATCH 4/7] ASoC: mchp-i2s-mcc: Add multi-channel support for I2S and LEFT_J formats Codrin Ciubotariu
@ 2021-02-23 18:19 ` Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 6/7] ASoC: mchp-i2s-mcc: Add support to select TDM pins Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 7/7] ASoC: mchp-i2s-mcc: Add FIFOs support Codrin Ciubotariu
6 siblings, 0 replies; 10+ messages in thread
From: Codrin Ciubotariu @ 2021-02-23 18:19 UTC (permalink / raw)
To: alsa-devel, devicetree, linux-kernel, linux-arm-kernel
Cc: alexandre.belloni, lgirdwood, robh+dt, tiwai, ludovic.desroches,
broonie, Codrin Ciubotariu, perex
SAMA7G5's I2S-MCC has 4 pairs of DIN/DOUT pins. Since TDM only uses a
single pair of pins for synchronous capture and playback, the controller
needs to be told which of the pair is connected. This can be mentioned
using the new "microchip,tdm-data-pair" property. The property is optional,
needed only if TDM is used, and if it's missing DIN/DOUT 0 pins will be
used by default.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
.../devicetree/bindings/sound/mchp,i2s-mcc.yaml | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml b/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
index a8a73f3ed473..0481315cb5f2 100644
--- a/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
+++ b/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
@@ -57,6 +57,23 @@ properties:
- const: tx
- const: rx
+ microchip,tdm-data-pair:
+ description:
+ Represents the DIN/DOUT pair pins that are used to receive/send
+ TDM data. It is optional and it is only needed if the controller
+ uses the TDM mode.
+ $ref: /schemas/types.yaml#/definitions/uint8
+ enum: [0, 1, 2, 3]
+ default: 0
+
+if:
+ properties:
+ compatible:
+ const: microchip,sam9x60-i2smcc
+then:
+ properties:
+ microchip,tdm-data-pair: false
+
required:
- "#sound-dai-cells"
- compatible
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 6/7] ASoC: mchp-i2s-mcc: Add support to select TDM pins
2021-02-23 18:19 [PATCH 0/7] Add I2S-MCC support for Microchip's SAMA7G5 Codrin Ciubotariu
` (4 preceding siblings ...)
2021-02-23 18:19 ` [PATCH 5/7] dt-bindings: mchp, i2s-mcc: Add property to specify pin pair for TDM Codrin Ciubotariu
@ 2021-02-23 18:19 ` Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 7/7] ASoC: mchp-i2s-mcc: Add FIFOs support Codrin Ciubotariu
6 siblings, 0 replies; 10+ messages in thread
From: Codrin Ciubotariu @ 2021-02-23 18:19 UTC (permalink / raw)
To: alsa-devel, devicetree, linux-kernel, linux-arm-kernel
Cc: alexandre.belloni, lgirdwood, robh+dt, tiwai, ludovic.desroches,
broonie, Codrin Ciubotariu, perex
SAMA7G5's I2S-MCC has 4 pairs of DIN/DOUT pins. Since TDM only uses a
single pair of pins for synchronous capture and playback, the controller
needs to be told which of the pair is connected. This can be mentioned
using the "microchip,tdm-data-pair" property from DT. The property is
optional, useful only if TDM is used. If it's missing, DIN/DOUT 0 pins
will be used by default.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
sound/soc/atmel/mchp-i2s-mcc.c | 52 +++++++++++++++++++++++++++++++---
1 file changed, 48 insertions(+), 4 deletions(-)
diff --git a/sound/soc/atmel/mchp-i2s-mcc.c b/sound/soc/atmel/mchp-i2s-mcc.c
index 52d3f43148dc..3d13efb11444 100644
--- a/sound/soc/atmel/mchp-i2s-mcc.c
+++ b/sound/soc/atmel/mchp-i2s-mcc.c
@@ -100,6 +100,8 @@
#define MCHP_I2SMCC_MRA_DATALENGTH_8_BITS_COMPACT (7 << 1)
#define MCHP_I2SMCC_MRA_WIRECFG_MASK GENMASK(5, 4)
+#define MCHP_I2SMCC_MRA_WIRECFG_TDM(pin) (((pin) << 4) & \
+ MCHP_I2SMCC_MRA_WIRECFG_MASK)
#define MCHP_I2SMCC_MRA_WIRECFG_I2S_1_TDM_0 (0 << 4)
#define MCHP_I2SMCC_MRA_WIRECFG_I2S_2_TDM_1 (1 << 4)
#define MCHP_I2SMCC_MRA_WIRECFG_I2S_4_TDM_2 (2 << 4)
@@ -245,6 +247,7 @@ struct mchp_i2s_mcc_dev {
unsigned int frame_length;
int tdm_slots;
int channels;
+ u8 tdm_data_pair;
unsigned int gclk_use:1;
unsigned int gclk_running:1;
unsigned int tx_rdy:1;
@@ -589,6 +592,8 @@ static int mchp_i2s_mcc_hw_params(struct snd_pcm_substream *substream,
if (!frame_length)
frame_length = 2 * params_physical_width(params);
} else if (dev->fmt & SND_SOC_DAIFMT_DSP_A) {
+ mra |= MCHP_I2SMCC_MRA_WIRECFG_TDM(dev->tdm_data_pair);
+
if (dev->tdm_slots) {
if (channels % 2 && channels * 2 <= dev->tdm_slots) {
/*
@@ -914,6 +919,45 @@ static const struct of_device_id mchp_i2s_mcc_dt_ids[] = {
MODULE_DEVICE_TABLE(of, mchp_i2s_mcc_dt_ids);
#endif
+static int mchp_i2s_mcc_soc_data_parse(struct platform_device *pdev,
+ struct mchp_i2s_mcc_dev *dev)
+{
+ int err;
+
+ if (!dev->soc) {
+ dev_err(&pdev->dev, "failed to get soc data\n");
+ return -ENODEV;
+ }
+
+ if (dev->soc->data_pin_pair_num == 1)
+ return 0;
+
+ err = of_property_read_u8(pdev->dev.of_node, "microchip,tdm-data-pair",
+ &dev->tdm_data_pair);
+ if (err < 0 && err != -EINVAL) {
+ dev_err(&pdev->dev,
+ "bad property data for 'microchip,tdm-data-pair': %d",
+ err);
+ return err;
+ }
+ if (err == -EINVAL) {
+ dev_info(&pdev->dev,
+ "'microchip,tdm-data-pair' not found; assuming DIN/DOUT 0 for TDM\n");
+ dev->tdm_data_pair = 0;
+ } else {
+ if (dev->tdm_data_pair > dev->soc->data_pin_pair_num - 1) {
+ dev_err(&pdev->dev,
+ "invalid value for 'microchip,tdm-data-pair': %d\n",
+ dev->tdm_data_pair);
+ return -EINVAL;
+ }
+ dev_dbg(&pdev->dev, "TMD format on DIN/DOUT %d pins\n",
+ dev->tdm_data_pair);
+ }
+
+ return 0;
+}
+
static int mchp_i2s_mcc_probe(struct platform_device *pdev)
{
struct mchp_i2s_mcc_dev *dev;
@@ -966,10 +1010,10 @@ static int mchp_i2s_mcc_probe(struct platform_device *pdev)
}
dev->soc = of_device_get_match_data(&pdev->dev);
- if (!dev->soc) {
- dev_err(&pdev->dev, "failed to get soc data\n");
- return -ENODEV;
- }
+ err = mchp_i2s_mcc_soc_data_parse(pdev, dev);
+ if (err < 0)
+ return err;
+
dev->dev = &pdev->dev;
dev->regmap = regmap;
platform_set_drvdata(pdev, dev);
--
2.27.0
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 7/7] ASoC: mchp-i2s-mcc: Add FIFOs support
2021-02-23 18:19 [PATCH 0/7] Add I2S-MCC support for Microchip's SAMA7G5 Codrin Ciubotariu
` (5 preceding siblings ...)
2021-02-23 18:19 ` [PATCH 6/7] ASoC: mchp-i2s-mcc: Add support to select TDM pins Codrin Ciubotariu
@ 2021-02-23 18:19 ` Codrin Ciubotariu
6 siblings, 0 replies; 10+ messages in thread
From: Codrin Ciubotariu @ 2021-02-23 18:19 UTC (permalink / raw)
To: alsa-devel, devicetree, linux-kernel, linux-arm-kernel
Cc: alexandre.belloni, lgirdwood, robh+dt, tiwai, ludovic.desroches,
broonie, Codrin Ciubotariu, perex
I2S-MCC found on SAMA7G5 includes 2 FIFOs (capture and playback). When
FIFOs are enabled, bits I2SMCC_ISRA.TXLRDYx and I2SMCC_ISRA.TXRRDYx must
not be used. Bits I2SMCC_ISRB.TXFFRDY and I2SMCC_ISRB.RXFFRDY must be used
instead.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
sound/soc/atmel/mchp-i2s-mcc.c | 76 +++++++++++++++++++++++++---------
1 file changed, 56 insertions(+), 20 deletions(-)
diff --git a/sound/soc/atmel/mchp-i2s-mcc.c b/sound/soc/atmel/mchp-i2s-mcc.c
index 3d13efb11444..f951fa0f39fd 100644
--- a/sound/soc/atmel/mchp-i2s-mcc.c
+++ b/sound/soc/atmel/mchp-i2s-mcc.c
@@ -176,7 +176,7 @@
*/
#define MCHP_I2SMCC_MRB_CRAMODE_REGULAR (1 << 0)
-#define MCHP_I2SMCC_MRB_FIFOEN BIT(1)
+#define MCHP_I2SMCC_MRB_FIFOEN BIT(4)
#define MCHP_I2SMCC_MRB_DMACHUNK_MASK GENMASK(9, 8)
#define MCHP_I2SMCC_MRB_DMACHUNK(no_words) \
@@ -230,6 +230,7 @@ static const struct regmap_config mchp_i2s_mcc_regmap_config = {
struct mchp_i2s_mcc_soc_data {
unsigned int data_pin_pair_num;
+ bool has_fifo;
};
struct mchp_i2s_mcc_dev {
@@ -257,7 +258,7 @@ struct mchp_i2s_mcc_dev {
static irqreturn_t mchp_i2s_mcc_interrupt(int irq, void *dev_id)
{
struct mchp_i2s_mcc_dev *dev = dev_id;
- u32 sra, imra, srb, imrb, pendinga, pendingb, idra = 0;
+ u32 sra, imra, srb, imrb, pendinga, pendingb, idra = 0, idrb = 0;
irqreturn_t ret = IRQ_NONE;
regmap_read(dev->regmap, MCHP_I2SMCC_IMRA, &imra);
@@ -275,24 +276,36 @@ static irqreturn_t mchp_i2s_mcc_interrupt(int irq, void *dev_id)
* Tx/Rx ready interrupts are enabled when stopping only, to assure
* availability and to disable clocks if necessary
*/
- idra |= pendinga & (MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels) |
- MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels));
- if (idra)
+ if (dev->soc->has_fifo) {
+ idrb |= pendingb & (MCHP_I2SMCC_INT_TXFFRDY |
+ MCHP_I2SMCC_INT_RXFFRDY);
+ } else {
+ idra |= pendinga & (MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels) |
+ MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels));
+ }
+ if (idra || idrb)
ret = IRQ_HANDLED;
- if ((imra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels)) &&
- (imra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels)) ==
- (idra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels))) {
+ if ((!dev->soc->has_fifo &&
+ (imra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels)) &&
+ (imra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels)) ==
+ (idra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels))) ||
+ (dev->soc->has_fifo && imrb & MCHP_I2SMCC_INT_TXFFRDY)) {
dev->tx_rdy = 1;
wake_up_interruptible(&dev->wq_txrdy);
}
- if ((imra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels)) &&
- (imra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels)) ==
- (idra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels))) {
+ if ((!dev->soc->has_fifo &&
+ (imra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels)) &&
+ (imra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels)) ==
+ (idra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels))) ||
+ (dev->soc->has_fifo && imrb & MCHP_I2SMCC_INT_RXFFRDY)) {
dev->rx_rdy = 1;
wake_up_interruptible(&dev->wq_rxrdy);
}
- regmap_write(dev->regmap, MCHP_I2SMCC_IDRA, idra);
+ if (dev->soc->has_fifo)
+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRB, idrb);
+ else
+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRA, idra);
return ret;
}
@@ -664,6 +677,10 @@ static int mchp_i2s_mcc_hw_params(struct snd_pcm_substream *substream,
}
}
+ /* enable FIFO if available */
+ if (dev->soc->has_fifo)
+ mrb |= MCHP_I2SMCC_MRB_FIFOEN;
+
/*
* If we are already running, the wanted setup must be
* the same with the one that's currently ongoing
@@ -726,8 +743,13 @@ static int mchp_i2s_mcc_hw_free(struct snd_pcm_substream *substream,
if (err == 0) {
dev_warn_once(dev->dev,
"Timeout waiting for Tx ready\n");
- regmap_write(dev->regmap, MCHP_I2SMCC_IDRA,
- MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels));
+ if (dev->soc->has_fifo)
+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRB,
+ MCHP_I2SMCC_INT_TXFFRDY);
+ else
+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRA,
+ MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels));
+
dev->tx_rdy = 1;
}
} else {
@@ -737,8 +759,12 @@ static int mchp_i2s_mcc_hw_free(struct snd_pcm_substream *substream,
if (err == 0) {
dev_warn_once(dev->dev,
"Timeout waiting for Rx ready\n");
- regmap_write(dev->regmap, MCHP_I2SMCC_IDRA,
- MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels));
+ if (dev->soc->has_fifo)
+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRB,
+ MCHP_I2SMCC_INT_RXFFRDY);
+ else
+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRA,
+ MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels));
dev->rx_rdy = 1;
}
}
@@ -765,7 +791,7 @@ static int mchp_i2s_mcc_trigger(struct snd_pcm_substream *substream, int cmd,
struct mchp_i2s_mcc_dev *dev = snd_soc_dai_get_drvdata(dai);
bool is_playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
u32 cr = 0;
- u32 iera = 0;
+ u32 iera = 0, ierb = 0;
u32 sr;
int err;
@@ -789,7 +815,10 @@ static int mchp_i2s_mcc_trigger(struct snd_pcm_substream *substream, int cmd,
* Enable Tx Ready interrupts on all channels
* to assure all data is sent
*/
- iera = MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels);
+ if (dev->soc->has_fifo)
+ ierb = MCHP_I2SMCC_INT_TXFFRDY;
+ else
+ iera = MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels);
} else if (!is_playback && (sr & MCHP_I2SMCC_SR_RXEN)) {
cr = MCHP_I2SMCC_CR_RXDIS;
dev->rx_rdy = 0;
@@ -797,7 +826,10 @@ static int mchp_i2s_mcc_trigger(struct snd_pcm_substream *substream, int cmd,
* Enable Rx Ready interrupts on all channels
* to assure all data is received
*/
- iera = MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels);
+ if (dev->soc->has_fifo)
+ ierb = MCHP_I2SMCC_INT_RXFFRDY;
+ else
+ iera = MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels);
}
break;
default:
@@ -815,7 +847,10 @@ static int mchp_i2s_mcc_trigger(struct snd_pcm_substream *substream, int cmd,
}
}
- regmap_write(dev->regmap, MCHP_I2SMCC_IERA, iera);
+ if (dev->soc->has_fifo)
+ regmap_write(dev->regmap, MCHP_I2SMCC_IERB, ierb);
+ else
+ regmap_write(dev->regmap, MCHP_I2SMCC_IERA, iera);
regmap_write(dev->regmap, MCHP_I2SMCC_CR, cr);
return 0;
@@ -903,6 +938,7 @@ static struct mchp_i2s_mcc_soc_data mchp_i2s_mcc_sam9x60 = {
static struct mchp_i2s_mcc_soc_data mchp_i2s_mcc_sama7g5 = {
.data_pin_pair_num = 4,
+ .has_fifo = true,
};
static const struct of_device_id mchp_i2s_mcc_dt_ids[] = {
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/7] ASoC: convert Microchip I2SMCC binding to yaml
2021-02-23 18:19 ` [PATCH 1/7] ASoC: convert Microchip I2SMCC binding to yaml Codrin Ciubotariu
@ 2021-03-01 13:59 ` Mark Brown
2021-03-01 14:54 ` Codrin.Ciubotariu
0 siblings, 1 reply; 10+ messages in thread
From: Mark Brown @ 2021-03-01 13:59 UTC (permalink / raw)
To: Codrin Ciubotariu
Cc: devicetree, alsa-devel, alexandre.belloni, tiwai, linux-kernel,
lgirdwood, ludovic.desroches, robh+dt, perex, linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 339 bytes --]
On Tue, Feb 23, 2021 at 08:19:23PM +0200, Codrin Ciubotariu wrote:
> This patch converts the Microchip I2SMCC bindings to DT schema format
> using json-schema.
Please place any DT binding conversion patches at the end of patch
serieses, there is a frequent backlog in reviews of those which can
result in everything else getting held up.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/7] ASoC: convert Microchip I2SMCC binding to yaml
2021-03-01 13:59 ` Mark Brown
@ 2021-03-01 14:54 ` Codrin.Ciubotariu
0 siblings, 0 replies; 10+ messages in thread
From: Codrin.Ciubotariu @ 2021-03-01 14:54 UTC (permalink / raw)
To: broonie
Cc: devicetree, alsa-devel, alexandre.belloni, tiwai, linux-kernel,
lgirdwood, Ludovic.Desroches, robh+dt, perex, linux-arm-kernel
On 01.03.2021 15:59, Mark Brown wrote:
> On Tue, Feb 23, 2021 at 08:19:23PM +0200, Codrin Ciubotariu wrote:
>> This patch converts the Microchip I2SMCC bindings to DT schema format
>> using json-schema.
>
> Please place any DT binding conversion patches at the end of patch
> serieses, there is a frequent backlog in reviews of those which can
> result in everything else getting held up.
>
I didn't know that, will do so in v2. Thanks!
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^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2021-03-01 14:55 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-02-23 18:19 [PATCH 0/7] Add I2S-MCC support for Microchip's SAMA7G5 Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 1/7] ASoC: convert Microchip I2SMCC binding to yaml Codrin Ciubotariu
2021-03-01 13:59 ` Mark Brown
2021-03-01 14:54 ` Codrin.Ciubotariu
2021-02-23 18:19 ` [PATCH 2/7] dt-bindings: mchp,i2s-mcc: Add SAMA7G5 to binding Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 3/7] ASoC: mchp-i2s-mcc: Add compatible for SAMA7G5 Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 4/7] ASoC: mchp-i2s-mcc: Add multi-channel support for I2S and LEFT_J formats Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 5/7] dt-bindings: mchp, i2s-mcc: Add property to specify pin pair for TDM Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 6/7] ASoC: mchp-i2s-mcc: Add support to select TDM pins Codrin Ciubotariu
2021-02-23 18:19 ` [PATCH 7/7] ASoC: mchp-i2s-mcc: Add FIFOs support Codrin Ciubotariu
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