From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DD8BC433DB for ; Wed, 17 Feb 2021 11:08:29 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3765164E24 for ; Wed, 17 Feb 2021 11:08:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3765164E24 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=ACULAB.COM Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ZQw2NPOfDJibUDn6cCqEYgiGzTIzF9nc11xNRkuNfCw=; b=RLbnHdKQm6UOfa/8y/m+YKvG3 O0i7akaEdGi4Lzh0PZRmghJAsjhm8EegrIdfIqPD81u8fo4SqBUHPnv1if3rYz4iM/9E6CHWf+BCf Drcqxq0F4Sw7SqfMhaWRc8tJDM1AhR5J2SH2e29+LOp6ZF4xtrJab1NYyyrJmAl21B3uJeUEYuph6 lsVUQRfYh9Uzi76uT97HU/5NuNJbrVmwnoB6LjwYcUfkQx5c7mcj69WiFpdis81OIruZU6APQLVML FlFHq+z45I6LYeChBKI8diN66+CmBwXsizsOcR8X3gmvb5u4bLxugooSkvUkEeICYmgXimwx8JNlj LjOs8zHzg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lCKeV-0007du-77; Wed, 17 Feb 2021 11:05:51 +0000 Received: from eu-smtp-delivery-151.mimecast.com ([185.58.86.151]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1lCKeS-0007cZ-8X for linux-arm-kernel@lists.infradead.org; Wed, 17 Feb 2021 11:05:49 +0000 Received: from AcuMS.aculab.com (156.67.243.126 [156.67.243.126]) (Using TLS) by relay.mimecast.com with ESMTP id uk-mta-259-RMvaaEXENMqE2t3sbz9bsg-1; Wed, 17 Feb 2021 11:05:41 +0000 X-MC-Unique: RMvaaEXENMqE2t3sbz9bsg-1 Received: from AcuMS.Aculab.com (fd9f:af1c:a25b:0:43c:695e:880f:8750) by AcuMS.aculab.com (fd9f:af1c:a25b:0:43c:695e:880f:8750) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 17 Feb 2021 11:05:39 +0000 Received: from AcuMS.Aculab.com ([fe80::43c:695e:880f:8750]) by AcuMS.aculab.com ([fe80::43c:695e:880f:8750%12]) with mapi id 15.00.1347.000; Wed, 17 Feb 2021 11:05:38 +0000 From: David Laight To: 'Will Deacon' , Jian Cai Subject: RE: [PATCH v2] ARM: Implement Clang's SLS mitigation Thread-Topic: [PATCH v2] ARM: Implement Clang's SLS mitigation Thread-Index: AQHXBRIkVPd+AU3vQkaBjLLnHtqPv6pcLG4Q Date: Wed, 17 Feb 2021 11:05:38 +0000 Message-ID: References: <3f61af0eee9b495e8e8c032902d033c5@AcuMS.aculab.com> <20210212195255.1321544-1-jiancai@google.com> <20210217094859.GA3706@willie-the-truck> In-Reply-To: <20210217094859.GA3706@willie-the-truck> Accept-Language: en-GB, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.202.205.107] MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=C51A453 smtp.mailfrom=david.laight@aculab.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: aculab.com Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210217_060548_531154_6E49F558 X-CRM114-Status: GOOD ( 16.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "linux-kernel@vger.kernel.org" , Kees Cook , Arnd Bergmann , Catalin Marinas , Masahiro Yamada , "ndesaulniers@google.com" , Russell King , Krzysztof Kozlowski , James Morris , Nathan Chancellor , "clang-built-linux@googlegroups.com" , "linux-security-module@vger.kernel.org" , "manojgupta@google.com" , =?iso-8859-1?Q?Andreas_F=E4rber?= , "llozano@google.com" , Ard Biesheuvel , "linux-arm-kernel@lists.infradead.org" , "Serge E. Hallyn" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Will Deacon > Sent: 17 February 2021 09:49 > > On Fri, Feb 12, 2021 at 11:52:53AM -0800, Jian Cai wrote: > > This patch adds CONFIG_HARDEN_SLS_ALL that can be used to turn on > > -mharden-sls=all, which mitigates the straight-line speculation > > vulnerability, speculative execution of the instruction following some > > unconditional jumps. Notice -mharden-sls= has other options as below, > > and this config turns on the strongest option. > > > > all: enable all mitigations against Straight Line Speculation that are implemented. > > none: disable all mitigations against Straight Line Speculation. > > retbr: enable the mitigation against Straight Line Speculation for RET and BR instructions. > > blr: enable the mitigation against Straight Line Speculation for BLR instructions. > > What exactly does this mitigation do? This should be documented somewhere, > maybe in the Kconfig text? I looked it up, it adds some fairly heavy serialising instructions after the unconditional jump. For BLR (call indirect) it has to use a BL (call) to an indirect jump. I don't know if the execution of the serialising instructions gets aborted. If not you could end up with unexpected delays - like those on some x86 cpu when they speculatively executed trig functions. It all seems pretty broken though. I'd expect the branch prediction unit to speculate at the jump target for 'predicted taken' conditional jumps. So you'd really expect unconditional jumps to behave the same way. BLR ought to be using the branch target buffer (BTB). (It isn't actually 100% clear that some processors don't use the BTB for non-indirect jumps though....) David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel