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Wed, 27 Feb 2019 04:11:31 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Wed, 27 Feb 2019 04:11:30 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Wed, 27 Feb 2019 04:11:30 -0600 Received: from [172.24.190.89] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1RABPY8002039; Wed, 27 Feb 2019 04:11:26 -0600 Subject: Re: [RFC PATCH 3/5] mtd: Add support for Hyperbus memory devices To: Boris Brezillon References: <20190219063607.29949-1-vigneshr@ti.com> <20190219063607.29949-4-vigneshr@ti.com> <7e79fff7-2565-28f7-7b2b-bb3098f1a928@cogentembedded.com> <3952b327-3aff-a32e-4280-6ab24c32cfd9@ti.com> <20190227105937.527c6573@kernel.org> From: Vignesh Raghavendra Message-ID: Date: Wed, 27 Feb 2019 15:42:27 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <20190227105937.527c6573@kernel.org> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190227_021145_286488_E5721769 X-CRM114-Status: GOOD ( 23.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , Arnd Bergmann , Sergei Shtylyov , "tudor.ambarus@microchip.com" , Richard Weinberger , Miquel Raynal , "Nori, Sekhar" , "linux-kernel@vger.kernel.org" , Marek Vasut , Rob Herring , "linux-mtd@lists.infradead.org" , Greg Kroah-Hartman , Brian Norris , David Woodhouse , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 27/02/19 3:29 PM, Boris Brezillon wrote: > On Wed, 27 Feb 2019 15:22:19 +0530 > Vignesh Raghavendra wrote: > >> On 26/02/19 11:46 PM, Sergei Shtylyov wrote: >>> On 02/19/2019 09:36 AM, Vignesh R (by way of Boris Brezillon ) wrote: >>> > [...] >>>> + */ >>>> + >>>> +struct hb_device { >>>> + struct map_info map; >>>> + struct device *dev; >>>> + struct device_node *np; >>>> + struct mtd_info *mtd; >>>> + struct hb_ops *ops; >>>> + enum hb_memtype memtype; >>>> + bool needs_calib; >>>> + bool registered; >>>> +}; >>>> + >>>> +/** >>>> + * struct hb_ops - struct representing custom Hyperbus operations >>>> + * @read16: read 16 bit of data, usually from register/ID-CFI space >>>> + * @write16: write 16 bit of data, usually to register/ID-CFI space >>>> + * copy_from: copy data from flash memory >>>> + * copy_to: copy data to flash_memory >>>> + */ >>>> + >>>> +struct hb_ops { >>>> + u16 (*read16)(struct hb_device *hbdev, unsigned long addr); >>>> + void (*write16)(struct hb_device *hbdev, unsigned long addr, u16 val); >>>> + >>>> + void (*copy_from)(struct hb_device *hbdev, void *to, >>>> + unsigned long from, ssize_t len); >>>> + void (*copy_to)(struct hb_device *dev, unsigned long to, >>>> + const void *from, ssize_t len); >>> >>> ... else these methods won't fly if you need to "massage" the controller >>> registers inside them... >>> >> >> If accessing controller register is the only need, wouldn't a private >> data pointer within struct hb_device be sufficient to hold pointer to >> controller specific struct? >> >> struct hb_device { >> ... >> void *priv; /* points to controller's private data */ >> }; >> >> >> Or do you see a need for separate structure for the HyperBus controller? > > Sorry to chime in. Just want to share my experience here: properly > splitting the controller/device representation is always a good thing. > When it's not done from the beginning and people start to add their own > controller drivers as if it was a flash device driver it becomes messy > pretty quickly and people add hacks to support that (look at the raw > NAND framework if you need a proof). So, I'd recommend having this > separation now, even if the onle controllers we support have a 1:1 > relationship between HB controller and HB device. > >> Alright, will separate controller and slave representation. Thanks for the feedback! -- Regards Vignesh _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel