From: Robin Murphy <robin.murphy@arm.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
iommu@lists.linux-foundation.org, jonathan.lemon@gmail.com,
dwmw2@infradead.org, hch@lst.de,
linux-arm-kernel@lists.infradead.org, baolu.lu@linux.intel.com
Subject: Re: [PATCH 2/2] iommu/dma: Avoid SAC address trick for PCIe devices
Date: Tue, 14 Jul 2020 12:42:36 +0100 [thread overview]
Message-ID: <ad3f66c8-7772-731d-cd0a-c5d6d46297cb@arm.com> (raw)
In-Reply-To: <20200713131426.GQ27672@8bytes.org>
On 2020-07-13 14:14, Joerg Roedel wrote:
> On Wed, Jul 08, 2020 at 12:32:42PM +0100, Robin Murphy wrote:
>> As for the intel-iommu implementation, relegate the opportunistic
>> attempt to allocate a SAC address to the domain of conventional PCI
>> devices only, to avoid it increasingly causing far more performance
>> issues than possible benefits on modern PCI Express systems.
>>
>> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
>> ---
>> drivers/iommu/dma-iommu.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c
>> index 4959f5df21bd..0ff124f16ad4 100644
>> --- a/drivers/iommu/dma-iommu.c
>> +++ b/drivers/iommu/dma-iommu.c
>> @@ -426,7 +426,8 @@ static dma_addr_t iommu_dma_alloc_iova(struct iommu_domain *domain,
>> dma_limit = min(dma_limit, (u64)domain->geometry.aperture_end);
>>
>> /* Try to get PCI devices a SAC address */
>> - if (dma_limit > DMA_BIT_MASK(32) && dev_is_pci(dev))
>> + if (dma_limit > DMA_BIT_MASK(32) &&
>> + dev_is_pci(dev) && !pci_is_pcie(to_pci_dev(dev)))
>> iova = alloc_iova_fast(iovad, iova_len,
>> DMA_BIT_MASK(32) >> shift, false);
>>
>
> Unfortunatly this patch causes XHCI initialization failures on my AMD
> Ryzen system. I will remove both from the IOMMU tree for now.
>
> I guess the XHCI chip in my system does not support full 64bit dma
> addresses and needs a quirk or something like that. But until this is
> resolved its better to not change the IOVA allocation behavior.
Oh bother - yes, this could have been masking all manner of bugs. That
system will presumably also break if you managed to exhaust the 32-bit
IOVA space such that the allocator moved up to the higher range anyway,
or if you passed the XHCI through to a VM with a sufficiently wacky GPA
layout, but I guess those are cases that simply nobody's run into yet.
Does the firmware actually report any upper address constraint such that
Sebastian's IVRS aperture patches might help?
Robin.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-07-14 11:44 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-08 11:32 [PATCH 1/2] iommu/intel: Avoid SAC address trick for PCIe devices Robin Murphy
2020-07-08 11:32 ` [PATCH 2/2] iommu/dma: " Robin Murphy
2020-07-13 13:14 ` Joerg Roedel
2020-07-14 11:42 ` Robin Murphy [this message]
2020-07-22 12:48 ` Joerg Roedel
2020-07-08 12:26 ` [PATCH 1/2] iommu/intel: " Christoph Hellwig
2020-07-10 14:20 ` Joerg Roedel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ad3f66c8-7772-731d-cd0a-c5d6d46297cb@arm.com \
--to=robin.murphy@arm.com \
--cc=baolu.lu@linux.intel.com \
--cc=dwmw2@infradead.org \
--cc=hch@lst.de \
--cc=iommu@lists.linux-foundation.org \
--cc=jonathan.lemon@gmail.com \
--cc=joro@8bytes.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).